Hello there,
In our project we are using the ACLK digitally out. We use 38KHz crystal for ACLK and using the following code to specify the ACLK,
BIS.B #BIT0,&P1DIR ; ACLK set out to pins
BIS.B #BIT0,&P1SEL ;
BIS #XT2OFF,UCSCTL6; // Set XT2 Off
BIC #XT1OFF,UCSCTL6; // Set XT1 On
BIS #XCAP_3,UCSCTL6; // choose the load cap
BIS.B #BIT4+BIT5,&P5SEL; // Port select XT1
When we probe the P1.0 by a logic analyzer we measure 32KHz (like the trimmed low-frequency oscillator (REFO),) rather than 38KHz. Can you help us understand what we may be doing wrong to get the incorrect frequency out?
Thanks,
-Amanda