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DRV8301: PWM output waveform is abnormal

Annie Liu
Genius 10295 points
Part Number: DRV8301

Hi Team,

This is a BLDC drive scheme. This way drives two MOS transistors, both with 4.7R resistors. The same schematic diagram will have no problems with other boards.

Only this board has a problem.

Best regards,

Annie

  • 0
    TI__Mastermind 21805 points

    Hello Annie,

    is this a high-side or low-side gate signal or the phase signal?

    Thanks,

    Matt

  • 0
    TI__Mastermind 18900 points

    Hello Annie,

    Short Answer:

    Assuming that the inductive ringing on the rising edge is the problem, and the two boards have the same layout and schematic; this could either be an assembly issue or difference register settings.

    Long Answer

    In general, the waveform looks like a typical 6 step trapezoidal commutation so there's nothing too bad the general shape at the zoomed out level. When zoomed in, I agree the inductive ringing seems like a lot of overshoot for how low the duty cycle is. I expect the other boards to still have some overshoot because it is very difficult to minimize parasitic inductance in the layout.

    With that being said, improper assembly and soldering for the power stage components, the DRV, and the FETs will add inductance in the paths a lot of solder build up between the pin and the PCB pad can add inductance. Assuming all boards were assembled by a profession PCB manufacturer, I'd say this is low possibility but is possible. If this board has ever been reworked then I would say its a high possibility.

    Otherwise, please check the register settings, specifically the gate driver current sense and sink values. I believe the default DRV settings use the highest current drive settings which would be higher than what is necessary for the FETs. Too high of gate drive current will cause ringing shown on the gates. If the settings are different, then this could answer the question. Otherwise, lowering the gate drive current could reduce the ringing seen on the waveform. See the link below for choosing the correct IDRIVE based on the FETs parameters.

     

    Best,

    -Cole

  • 0 in reply to Cole Macias
    TI__Genius 10295 points

    Hi Cole,

    The customer confirms that the procedure is exactly the same after inspection. But when he checked the circuit, he found that BST_A, BST_B, BST_C, sawtooth wave appeared when there was no PWM drive, and the sawtooth waveform was transmitted to SH_A, SH_B, SH_C through the capacitor.

    best regards,

    Annie

  • 0 in reply to Annie Liu
    TI__Mastermind 18900 points

    Hello Annie,

    The customer confirms that the procedure is exactly the same after inspection.

    The same procedure used to take the picture in the original post? If so, sounds like something broke and need to see if GVDD is at 11V DC? If so, they need to replace the device and make the soldering and assembly is of good quality. Let me know if I'm miss understanding something.

    Best,

    -Cole

  • 0 in reply to Cole Macias
    TI__Genius 10295 points

    Hi Cole,

    The customer confirms that GVDD has the same voltage (11V). He changed a new one. It's okay before it runs. When it started running, the same issue happened again. Customer would like to know why this issue is happened?

    Best regards,

    Annie

  • 0 in reply to Annie Liu
    TI__Mastermind 18900 points

    Hello Annie,

    We were trying to figure out if this sawtooth waveform was sourced from the trickle charge pump or GVDD (which is the DRV) or if it was coming from the phase (which is external or from the motor).

    Because the gate is not being driven here and the phase is HI-Z, we expect the BST to be DC with no sawtooth shape or ripple. So we still can't figure out where it is coming from.

    So, we either get more info from more waveforms or we continue to blindly try to fix what might be happening, assuming the problem is in the DRV (or around it).

    DRVx (or around it):

    Assuming the problem is in the DRV, we'd like to see the schematic. We'll be looking for anything that can be loading the GVDD or gates. In addition, we'll be looking to see if components are the same as the recommended:

    • 2.2 µF (20%) ceramic, ≥ 16 V for GVDD
    • 0.022 µF (20%) ceramic, rated for PVDD1 (for example 24V PVDD1 = 36V voltage rating capacitor or rule of thumb of 1.5 times the amount), between CP1 and CP2
    • 0.1 µF (20%) ceramic, ≥ 16 V for BSTx

    Replacing these passive components to see if the problem is fixed might be a good debug step. Otherwise, changing the DRV from this bad board to a good board, to see if the issue follows the device, could help. You've seemed to change the DRVx and replicate the issue which makes us think that the layout, assembly, or components are bad (if the DRV is not at fault). But we still don't have enough information to really say that. 

    More information:

    We'd like to see GVDD, BSTx, SHx, and GHx all on the same oscilloscope capture (utilizing multiple channels).

    Best,

    -Cole

  • 0 in reply to Cole Macias
    TI__Genius 10295 points

    Hi Cole，

    The customer has used DRV8301 on two solutions. He shared schematic diagram:

    Best Regards,

    Annie

  • 0 in reply to Annie Liu
    TI__Mastermind 18900 points

    Hello Annie,

    Right away, they're using more than the recommended on GVDD and BST. Can they replace the existing with the recommended values and see if the problem goes away?

    Best,

    -Cole