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LM5023: Voltage reduction of SMPS to Zero Output volatge before the required load

Part Number: LM5023

Dear TI Expert,

I used LM5023 IC for my SMPS  of 15Volt,2.5A Output From 3phase 4 wire input AC Supply . I got the required LM5023 IC based schematic design from webench TI Tool. 

We did the complete PCB board And under testing condution, we are getting the required output voltage of 15 volt at no load conditon. But under loaded SMPS condition, Output current of SMPS Greater than 0.8A, the output of SMPS voltage is reducing to Zero volage. In our application We need to operate the SMPS up to 2.35A.

How to eliminate this issue of SMPS as mentioned above As voltage reduction of SMPS to Zero at more than 0.8A  Load output. I Hereby Attaching schematic and PCB board file of our SMPS and Webench File. Please kindly give a solution as soon as possible. 

Thank you

Best Regards,

Muhammed Rafi C K


batterychargersmps.pdfBCharger_Board2.brd4857.WBDesign38.pdf

  • Hi, Muhammed:

    Thanks for reaching us. 

    I will check the schematic and layout. Before I finish this checking, would you please provide the waveform of Vcc, VCOMP and Vaux for reference? It would be helpful to check if there is anything mis-trigger the protection. 

    Thanks 

    Regards, 

    Wesley

  • Hi, Muhammed:

    Would you please share me the transformer specification, too?

    Thanks. 

    Regards, 

    Wesley

  • Dear Wesley,

    Thank you for your speedy response.

    I hereby attaching the PDF document of Different waveforms  Vcc, VCOMP and Vaux From our SMPS testing Under different loaded and no-load condition. Also I am attaching the Transformer design pdf in our SMPS Obtained from TI-Webench Tool.

    Best Regards,

    Muhammed Rafi C K

     Waveforms of SMPS.pdfCoreCoilformer38.pdf

  • Hi, Muhammed:

    It seems OVP triggered. According to your output voltage is 15V, and the VF of DSEC is 0.66V. 

    So the the Vsec = 15+0.66=15.66. Based on the turns ratio of transformer Ns:Naux = 9:7 => Vaux = 15.66/9*7 = 12.18V. 

    VQR would be Vaux*R15/(R14+R15)=12.18V*12.1k/(12.1k+36.5k) = 3.03V. Which is the OVP threshold which note on page 5 in datasheet. 

    When I looked into the waveform, Vaux is not so accurate but Vcc is around 11.6V. Considered voltage drop of D20, Vaux seems closed to 12.x V. 

    Furthermore, the symptom of OVP is latched, which meets your waveform. Thus, would you please reduce R15 to 10k~11k to clarify if it is caused by OVP first? You may page 14 in datasheet about OVP protection.

    I knew this value comes from WEBENCH. Maybe it does not consider enough design margin. Sorry about that.

    Regards, 

    Wesley

     

  • Hi,  Muhammed:

    Would you please share me if the issue solved since there is no update for a while?

    If yes, I would like to close this thread or please let me know if there is any assistance needs.

    Thanks. 

    Regards, 

    Wesley

  • Dear Wesley,

    Sorry for the late reply from side, i changed the resistor as you mentioned above and some other modifications in the design with the help of data sheet. it is working good. 

    Thank you 

    Best Regards,

    Muhammed Rafi C K