Over current operation of UCC28065.
Hello,
Thank you for the updated measurements.
I see there is a lot of ringing on the CS pin waveforms (green traces). None of this ringing appears in the actual PFC current shown in Channel 1 (yellow traces). Do you have an R-C filter to GND on the CS pin?
There should not be so much ringing if there is an RC and if the capacitor has minimum path lengths to CS and AGND.
Typical values are 100ohm and 10nF.
So much ringing suggests that either there is insufficient filtering on CS or the filter capacitor is terminated to a GND point far from the AGND pin (pin 6) of the UCC28065 and the GND path has oscillating current in it.
Here is a website that describes two types of tip & barrel probing: https://www.electronicspecifier.com/products/power/oscilloscope-probing-techniques-for-measuring-power-supply-ripple
I have used both methods, and the "paperclip" method works well when you have to probe over the top of an IC. The UCC28065 responds to the signals that it "sees" at its pins with respect to AGND. If your oscilloscope GND point was away from pin 6, there may be "ground-bounce" from ringing di/dt through stray inductance that is superimposed on the current sense signal.
On slide 2 of your file, you show some peak noise exceeding -200mV that is less than 100ns in duration.
However the 100-ns blanking time is applied on the rising and falling edges of the gate drives. 
Please check the waveforms of GDA and GDB with respect to Vcs. I think that the gate drive has fallen about 400ns before the peak CS voltage and the 100-ns blanking had already expired. If your MOSFET is large or has a high gate resistance, it may have a 400-ns turn-off delay. 
If this is the case, I suggest to try increasing the value of the CS filter cap (if there is one).
But most importantly, the filter cap for CS should connect to CS and AGND as close as possible to the IC pins, as seen in the PCB layout example of Figure 36 on page 47 of the datasheet. Keep high power currents out of the AGND net.
Regards,
Ulrich
Dear Sir,
Thank you for the additional waveforms and diagrams. Let me assure you that I did understand the phenomenon that you proposed about common mode noise superimposed on the signal. In fact I was trying to convey the exact same message to you, except I think it is more than noise pick-up on the 'scope probe. Instead, I think it is real GND noise from MOSFET turn-off coupled to one side of the CS filter cap which carries the noise into the CS pin.
Please see my sketch of this. 
The controller acts on the signals that it sees at its input pins with respect to its AGND pin, not to GNDs anywhere else in the system.
If the filter cap GND is not close to the AGND pin, and if switching currents travel through the path between the cap GND and the AGND pin, then stray inductance in that path will generate noise which superimposes onto the voltage waveform from the current sense resistor.
In this case, increasing the cap value will not solve the problem. Only diverting the switching current to another path will solve it.
That is why I mentioned the PCB layout example in Figure 36, so that you can examine your design to compare.
I completely understand and agree with your diagrams on sheet 3.
If your sense resistor value is not low enough to accommodate two maximum peak inductor currents in-phase, then it will result in reduced average current as shown at the bottom of slide 3. The UCC28065 datasheet describes this on page 32, and the peak current equation (34) to design Rs (eqn 35) takes this into account on page 41.
If the CS cap GND path cannot be improved, perhaps the only solution left is to reduce the value of Rs.
Regards,
Ulrich
