Hi Pooja,

Thanks for reaching out!

(1) For the schematic, could you please share us a high resolution one?

(2) For your question 1, could you please further describe your question? If I am understanding correct, do you need output sequence of different rails?

(3) CEN is the capacitor you added.

(4) For delay time, do you need the delay time between Vin and LDO OUT1 and LDO OUT2? We can check on bench.

BRs

Lucia

Hi Lucia

Thanks for the quick replay 

1.TPS65262-1RHBT  have 3 BUCK 
If mode pin is made it GROUND ,then that is external power up sequence will get activate 
In my case I have to control the enable 1,2 and 3 

*Using external RC calculation I have set the enable time  4.5 mili sec after 4.5 mili sec BUCK1 output have to release similarly for BUCK2 and BUCK3 [Iset RC value as the time delay is 0.6 mili sec  for both enable 2 and enable 3 ]

Cen is the capacitor value should I need ? please correct me If I am wrong!

Here I have attached the schematic for your reference 
12w.pdf 

Requesting you to help us on this 

Thanks,

Pooja Ak

Hi Pooja,

My colleague Kimi will give you reply soon. Thanks!

BRs

Lucia

Hi Pooja

I cannot fully understand your target delay for BUCK2. Is it 4.5ms or 0.6ms?

Could you correct me in the below sequence diagram if i misunderstand you.

On EVM board, delay for LDO OUT1 is 10us and delay for LDO OUT2 is 11us.

More details can be found in my attachment below.

TPS65262’s LDOs delay and BUCK external delay.pdf

In your schematic, C158 is the CEN1 but you should remove R67.

Best regards!

Kimi

Yes I understood now ,I have removed the pullup resistor and changed the capacitor value ,now I have set the time delay to 4.8mS for Buck1 and 0.45 mS for nuck2 and BUCK3 
Thank you so much for the support ! 

Here by I have attached the schematic for your reference ,requesting you to review the shared schematics and let me know your feedback on this!
PIMIC.pdf

Thanks,

Pooja Ak

Hi Pooja

You are welcome

I think your schematic is OK.

Tips: Because EN pull-up current varies from one IC to another. If find your actual delay is shorter than calculated, you could choose a larger CEN.

Best regards

Kimi

Hi Jiacheng 

Thanks for the suggestion ,
Noted !

Thanks,

Pooja Ak

Hi Pooja

For more detailed schematic review, i recommend that:

1. PGOOD should be connected to V7V rather than Vin. If your input ranges over 6.3V, PGOOD will possibly damage.

2. BST resistor could be added. If EMI is concerned, BST resistor will help to reduce EMI.

3. Loop resistor could be added. It helps loop analysis.

For inrush current and phase margin, I will analyze in simulation and give my suggestions in further reply.

Best regards

Kimi

Hi Kimi

Thank so much for the input ,
I will include your feedback on our schematic,but I have doubt : How will it  0ohm will reduce the emission can you please explain 

[BST resistor could be added. If EMI is concerned, BST resistor will help to reduce EMI.]

Thanks

Pooja Ak

Hi Pooja,

0ohm Rboot will not have effect. What we want to comment here is that you can leave a space in your schematic/layout in case you need to adjust switching speed. 

Thanks!

BRs

Lucia