BQ76940: BQ76940 Schematic Review

Hi Erik,

I responded to this yesterday on this post,  https://e2e.ti.com/support/power-management/f/196/t/866241  but it is not there today and the system did not seem to save the response, so:

The schematic displays cut off on the right and bottom and with the component information missing or misaligned.  As an example the link at C11 is for a thermistor.

• The balance circuit looks ok, but its connection on page 14 has problems for some cells.  Example: U_balance_cell_12 CELL_GATE should connect to the right side of R11 rather than R10.  U_balance_cell_9 looks connected properly
• With the right side of the connections to BQ76940 missing it can't be checked, but you seem to have taps for the clamp diodes and power for the IC with points A & B identified. See the general figure 15 in the data sheet and details in the application notes/video.
• Your input filter caps Cc, C7, C9, etc show 1 uF like the EVM, this value can have voltage errors during balancing due to filter settling time.  You might use 0.22 or 0.1 uF if suitable.
• The 1uF Cc caps are 6.3V if the random link is correct.  If you balance every other cell the voltage on the unbalanced cell between will double, so 8.4V in many applications, check yours.  Select a cap according to your organization's derating guidelines, often this might be 10, 16, or 25V.
• You don't need to use ALERT if you don't want it, but keep the pull down recommended and avoid noise coupling onto the pin.  Also your software should clear the status when found high to minimize the effect of the dIALERT current shown in the data sheet.
• For the group power supply caps, each group will have about 4.2V/cell x 4 cells or 16.8V.  Again with derating you might pick 25, 35 or 50V components. 
• For the output capacitors CAPn, REGOUT, normal voltage is 3.3V, a 6.3V component may be suitable.
• Grounding the sense resistor at the battery side allows a typically larger discharge current to move the SRN pin voltage positive which has a much higher abs max range in the positive direction than negative.  This does modulate the voltage of signals referenced to "OUT" by the load current acting on the sense resistor and path impedance.  The normal recommended connection is to reference or ground at the battery side.  Note the recommended range of SRP is +/- 10 mV.  With the connection on the "OUT" side, the SRP will go negative with load current.  You can protect the pin with a Schottky diode at the pin, but this is not the recommended range, and remember that a diode is not ideal and has a V-I curve which will vary with temperature.   It could introduce a non-linearity into your currrent measurement.

For layout:

• For signals referenced to the BQ76940 VSS, be sure to filter at the VSS potential, connection like the data sheet figure 19 vs 20.
• Use Kelvin connections at the sense resistor, route differentially to the filter components.
• Use general electronics routing guidelines, signals should reach the filter capacitor before the IC pins.
• Be aware that the TIDA illustrates a operational example, but may not be suitable for all systems.  If you have a high field requirement you may need to add circuitry to attenuate signals picked up in the cell interconnect where it enters the board.  Use techniques common to your industry.

Hi Erik,

C23, C25, C26 look like filter resistors for the SRP & SRN, they would connect at the top of the 100 ohm R26 & R27 to match the data sheet & EVM schematic recommendations.

All I see.  Hope this helps.