Hi, dear experts,
We want to enableTI’s inline ECC for DDR when DDR size is 3GB, could you give me some guidance about this?
Best Reagrds
Nathan
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Hi, dear experts,
We want to enableTI’s inline ECC for DDR when DDR size is 3GB, could you give me some guidance about this?
Best Reagrds
Nathan
Nathan,
I believe you already have the 2GB inline ECC enabling patches.
inline-ecc-2GB.tar
Original code changes:
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index d9846f3c46..8f4768f1a2 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -71,8 +71,8 @@ int dram_init_banksize(void) #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1; - gd->bd->bi_dram[1].size = 0x80000000; - gd->ram_size = 0x100000000; + gd->bd->bi_dram[1].size = 0x40000000; + gd->ram_size = 0xC0000000; #endif
This made sure that conservatively the 1GB memory was reduced to account for Inline ECC.
So 4GB --> 3 GB.
Now since your available memory itself is 3 GB we can reduce it to 2.5GB.
Something like Below:
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index d9846f3c46..8f4768f1a2 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -71,8 +71,8 @@ int dram_init_banksize(void) #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1; - gd->bd->bi_dram[1].size = 0x80000000; - gd->ram_size = 0x100000000; + gd->bd->bi_dram[1].size = 0x20000000; + gd->ram_size = 0xA0000000; #endif
Other parts should remain the same.
- Keerthy
Hi Nathan,
I have the enabled ECC for the higher addresses (> 32 bit addresses). Since
DJI the request is for 3GB ECC enabling. I have enabled 3GB DDR.
The R5 SPL cannot access > 32 bit addresses directly so it needs a Region based address translation.
(RAT) Mapping.
So While DDR gets initialized I map 0x80000000(Accessible by R5) to 0x880000000 (> 32 bits).
Clear them out to 0s. Unmap the RAT translation.
Set the ECC second range for the 3rd GB.
I have booted to Linux and memtester runs well.
More testing is welcome. Patch on top of 7.3.
0001-Enable-ECC-for-3-GB.patch
If no other questions please click on verify answer.
Best Regards,
Keerthy