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AM3352--DDR test

user6150065
Prodigy 50 points

Hi sir,

When I do DDR3 test after used the EMIF tool to configure the hardware platform(AM3352ZCZA80+MT41K256M16TW-107).

I found two items failed--output slew rate(SRQseR/SRQseF)

The failed waveform is measured during the read cycle.

It seems the driving strength is too strong but the EMIF tool has been filled as recommendation.

Can you help with it?

Thanks.

 DDR3 Failed-2021-1026.pdf

  • 0
    TI__Guru* 80310 points

    The EMIF tool has recommended values, but you may need to adjust these (especially the IO settings) for your board design.  If you need to adjust the memory output driver setting in the EMIF tool, see line 16 "Output Driver Impedance" in the DDR memory I/O settings

    Regards,

    James

  • 0 in reply to JJD
    Prodigy 50 points

    Hi James，

    I have tried to adjust the output driver impedance from RZQ/6 to RZQ/7

    but the slew rate will be faster , the attached file is the result.

    And, Do you know if the faster slew rate signals to AM335X,

    Is there any issue  or risk?

    Thanks.

  • +1 in reply to user6150065
    TI__Guru* 80310 points

    According to the DDR3 datasheet, the SRQse parameter is measured with a specific test load configuration which is not intended to represent a system environment.  So you may not measure the min/max limits with your particular design.  This is a characteristic of the DDR memory, so you would have to ask the DDR memory vendor for advice.

    There is technically no input slew requirements in the JEDEC spec, so the only risk is if the memory does not meet the output slew under the test load configuration

    REgards,

    James