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Hello TI's expert,
On the EVM the SoC pin E24 (OSPI0_CSn3) connect to INT# of OSPI-NOR chip.
And I read the OSPI Interrupt Requests of AM64x TRM
The OSPI module generates three interrupts. The ECC interrupts
(FSS0_OSPI_0_OSPI_ECC_CORR_LVL_INTR_0 and FSS0_OSPI_0_OSPI_ECC_UNCORR_LVL_INTR_0)
are generated by the OSPI ECC aggregator.
The other interrupt (FSS0_OSPI_0_OSPI_LVL_INTR_0) is generated by the OSPI module.
So, I mean that the OSPI0_CSn3 is configured to connect to OSPI0_ECC_FAIL to support Flash memory internal ECC.
But I saw the dts does not config pin for ECC_FAIL:
I would like to ask you how the FSS manage the ECC of OSPI device. I did not see any source code mentioned the ECC Status Register of SPI-NOR in both U-BOOT and Kernel.??
Where is irq of OSPI? I want to check if the ospi interrupt service is already check OSPI_ECC_CORR_LVL_INTR_0 or not.
I want to check the ECC of OSPI device on the Linux, How can I do it?
Many thank you for your supports
Brian.
Hello Andrew,
This is an E2E thread created by me bout HOW TO CREATE UBI FOR ospi-rootfs. There mentions the parameter "minimum I/O unit sizes, e.g. 16 or 32 bytes in the case of ECC'd NOR flashes". I do not understand how to determine 16 or 32 so need Hong explain me.
I mean that the OSPI0_ECC_FAIL pin should be connected to INT# of S28HS512T, but not used in AM64x-EVM. You can check on EVM Kit.
SoC, ECC_FAIL for external flash device where ECC is checked on the flash.
On the Flash device:
I also checked the OSPI node in DTS file, the ECC_FAIL pin did not configure.
Please scan your source code again, and can you help me how can I check an error (ECC) from OSPI device?
Maybe no need this ECC_FAIL pin to manage the ECC from flash device? Maybe I am wrong.
Many thank you for your supports
Thinh
