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Hi Experts:
Now we know that disable LPDDR4 DQ training setting.
But our customer want to know whether have method to increase the DQ training interval to 1-2 second level. They think that our DQ training strategy interval is ms level the windows is too short.
Because IC temperate change is not very fast, DQ training interval windows to second level meet their request. They will more better LPDDR4 access performance because they found that DQ training will affect Main domain R5F access LPDDR4 latency stability.
Best Regards!
Han Tao
Hi Tao,
They should not disable periodic write DQ training.
The interval of how often periodic write DQ training occurs should already be maxed out though the PI_WDQLVL_INTERVAL and PI_LONG_COUNT_MASK parameters.
Regards,
Kevin
Hi Kevin:
Thanks for your confirm it.
WIll share those setting results with customer.
Best Regards!
Han Tao