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DRA750: The file system of Samsung eMMC(HS200) is broken

Part Number: DRA750

Hi, Experts

SoC: DRA750

SDK VERSION: 3.2

Kernel version: Linux-4.4.84

Our customer has Samsung eMMC issue in their system based on DRA750. List below is the detail offered by our customer. Thank you for your help!

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We have received abnormal products and the error status is analyzed as bellow.

 

  • Basic info of this issue:

Reproduce in desk/debug env: none

Reproduce in real products: 2%

Reproduce situation: system startup/or running.

Issue Details : the file-system cannot boot, because the key-files(showing in bellow) is lost or corrupted. But the kernel is boot.

  • Basic info of our products:

SDK VERSION: 3.2

Kernel version: Linux-4.4.84

MMC driver modification by customer: none.

  • Products information of KLM8G1GEUF-B04P-EMMC-8GB-Ver5.1-3.3V-8(as referred as Samsung emmc)
    • meta section (flash type SLC):
      • emmc frameware
      • map tab: address map for logic and physical address
      • user cannot access those sections
    • User data section(flash type:mlc): we are using this section for kernel/rootfs storage.

 

  • The mmc controller is working at HS200 mode but the I/O voltage is 3.3v which against specifications (6.6.2.2 section of Embedded Multi-Media Card (e•MMC) Electrical Standard (5.1), JESD84-B51).

  • We have double checked with the mmc driver and found that the driver has been switch the mode to 1.8v with register 0x13c(the address offset 0x13c is from the source code, the actual address might be 0x3c. the register name is AC12) bit19(search from the source for AC12_V1V8_SIGEN). The question is, why the the voltage is not 1.8v?

 

  • files of /opt/user/dms or /opt/user/lib/init (/opt is mounted with /dev/mmcblk0p2 and library & program is programmed there.) is broken. And the kernel error log is bellow.

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[·· 36.242869] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 1, block bitmap and bg descriptor inconsistent: 387 vs 390 free clusters
[·· 36.260867] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 2, block bitmap and bg descriptor inconsistent: 8189 vs 8192 free clusters
[·· 36.285184] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 3, block bitmap and bg descriptor inconsistent: 3776 vs 3779 free clusters
[·· 36.300090] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 4, block bitmap and bg descriptor inconsistent: 1459 vs 1462 free clusters
[·· 36.315835] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 5, block bitmap and bg descriptor inconsistent: 7752 vs 7755 free clusters
[·· 36.330445] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 6, block bitmap and bg descriptor inconsistent: 8189 vs 8192 free clusters
[·· 36.344824] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 7, block bitmap and bg descriptor inconsistent: 1565 vs 1568 free clusters
[·· 36.360756] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 8, block bitmap and bg descriptor inconsistent: 917 vs 920 free clusters
[·· 36.375191] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 9, block bitmap and bg descriptor inconsistent: 1786 vs 1789 free clusters
[·· 36.390123] EXT4-fs error (device mmcblk0p2): ext4_mb_generate_buddy:758: group 10, block bitmap and bg descriptor inconsistent: 877 vs 880 free clusters
·
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

 

 

  • We tried to update the system and the kernel panic is showing as bellow:

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·[· 234.138843] Unable to handle kernel paging request at virtual address ffffffec
[· 234.146104] pgd = ee195d80
[· 234.148821] [ffffffec] *pgd=80000080007003, *pmd=affa6003, *pte=00000000
[· 234.155578] Internal error: Oops: 207 [#1] PREEMPT SMP ARM
[· 234.161085] Modules linked in:
[· 234.164161] CPU: 0 PID: 1222 Comm: tar Not tainted 4.4.84+ #1
[· 234.169929] Hardware name: Generic DRA74X (Flattened Device Tree)
[· 234.176049] task: eee24980 ti: e8162000 task.ti: e8162000
[· 234.181476] PC is at iommu_fault_handler+0x18/0x14c
[· 234.186375] LR is at handle_irq_event_percpu+0xb4/0x160
[· 234.191622] pc : [<c02a15ec>]··· lr : [<c0072968>]··· psr: a0030193
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

 

  • Aiming at the problems raised by the software department,the hardware department measured the clk and data waveforms of Samsung eMMC and Micron eMMC

 

  • The clock frequency of Samsung eMMC is about 192MHz,and the clk and data waveforms are seriously distorted

 

  • Clock waveform of Samsung eMMC

  • Data waveform of Samsung eMMC

  • Data waveform eye diagram of Samsung eMMC

  • Clock waveform of Micron eMMC

  • Clock waveform eye diagram of Micron eMMC

  • Data waveform of Micron eMMC

  • Data waveform eye diagram of Micron eMMC

 

  • In the data sheet of Samsung eMMC,the maximum speed of 3V I/O port is 52MHz

  • Description of bus speed mode of DRA750

  • HS200 mode selection flow diagram

  • The bus speed mode set by the software is HS200 mode,eMMC will first detect the level of Vccq pin to determine whether HS200 mode is selected.Because the I/O port uses 3.3V level,it cannot meet the operating conditions of HS200 mode.However,the clock speed of DRA750 and Samsung eMMC is automatically negotiated to 192MHz.

 

  1. Why the HS200 mode is still negotiated when the operation conditions are not met
  • Hi Tony,

    Voltage switching for eMMC interface on DRA750 at runtime is not supported, so voltage supply needs to be at a fixed 3.3 V or 1.8 V. In order to disable HS200 mode (as well as lower the maximum frequency allowed to be negotiated up to if necessary), please modify the device DTS file and comment out the highlighted declarations under the mmc2 section:

    &mmc2

         { status = "okay";

           max-frequency = <192000000> ;

           bus-width = <8> ;

           sd-uhs-sdr25;

           sd-uhs-sdr12;

           mmc-hs200-1_8v;

           mmc-ddr-1_8v; }; 

    Could you also provide the part number for the Micron eMMC previously used? Which speed mode was the Micron eMMC being run at, and with all the same hardware (IO source of 3.3V) and software (same DTS file) as you are currently using?

    Regards,

    Marco

  • Hi, Marco

    Got it! Will try it.

    You can get more detail on hardware design by referring to another ticket list below

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1165953/dra750-the-samsung-hs200-emmc-doesn-t-work-well

    Thank you for your help!

    Best Regards

    Tony

  • Could you also provide the part number for the Micron eMMC previously used? Which speed mode was the Micron eMMC being run at, and with all the same hardware (IO source of 3.3V) and software (same DTS file) as you are currently using?

    The PN of Micron eMMC that our customer previously used is MTFC4GMWDM-3M AIT A. It works well. I think the Micron eMMC works in JC64 standard SDR mode because our customer told me that the frequency was 24MHz and the signal voltage was 3.3V. Then they replaced Micron eMMC by Samsung eMMC(KLM8G1GEUF-B04P). But they changed nothing, neither hardware nor software.

    They told me the detail on speed negotiation. For Micron eMMC, the HS200 mode is failed in the first time,  then standard SDR mode is successful in the second time.  For Samsung eMMC, the HS200 mode is successful in the first time. But as you know, there is not 1.8V power supply in the hardware platform, so the signal voltage can't be changed to 1.8V.

    Best Regards

    Tony