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Original question:

AM6442: PCIe external reference clock

AM6442: AM64 PCIe REFCLK

Thierry HAUSER
Intellectual 280 points
Part Number: AM6442
Other Parts Discussed in Thread: CDCI6214

Hello

Let’s me add a related topic concerning electrical buffer of  PCIe REFCLK.

SPRUJ63 (EVM GP user guide) mentioned 2 termination resistors of 49.9ohm, which could implies HCSL driver technology to be placed close to AM64 (as it is done in PCB):

 

But, all 5 schematics variants of EVM GP doesn’t include  this (R622/R623) termination resistors, all DNI .

What should we do on that point ? Especially when we would like to manage both configuration : ROOT COMPLEX and ENDPOINT.
Thanks for your help

  • 0
    TI__Prodigy 535 points

    Apologies for the further delay.  Best person to answer is out of office but returning 4/10 and then can address.

  • 0
    TI__Mastermind 27840 points

    Hello,

    The EVM was designed to support multiple SERDES clocking configurations, hence the need for different BOM stuff options.

    Yes, SERDES0 REFCLKP/N requires HCSL inputs when operating in input mode.

    In the default (shipped) state, PCIe REFCLK is supplied to both the SoC and the PCIe connector via the CDCI6214 clock generator device operating in HCSL mode. For TMDS64GPEVM Revision PROC101B(001) you will find the required on-board 49.9 (1%) Ohm termination resistors for same installed as R681/R682 and R683/R684 respectively.

  • 0 in reply to -DK-
    Intellectual 280 points

    Thanks DK for your answer.

    Just to be sure :
    In our design we plan to support both ROOT COMPLEX and ENDPOINT, without any REFCLK clock driver other than the AM64's one (because errata shown that there is no more issue on REFCLK).
    Could you please confirm/reject the following assumptions :
    In case of ROOT COMPLEX mode, we need to add 2 x 49.9ohm pull down resistor close to REFCLK balls of AM64.
    In case of ENDPOINT mode, these resistors must be removed.
    Thanks for your feedback.

  • 0 in reply to Thierry HAUSER
    Intellectual 280 points

    Hello DK,

    Could you please confirm the above assumptions ?
    Futhermore, is there any need to add serial resistor into REFCLK path?
    Thanks for your feedback.

  • 0 in reply to Thierry HAUSER
    TI__Mastermind 27840 points

    Thierry,

    My comments below are based on the understanding that you're using the PCIe connector in both modes (socket for RC, edge for EP) and want to support generic add-in cards in RC mode. I mention this because the clocking requirements may change if you are using PCIe as a backplane bus on a single board solution.

    In case of ROOT COMPLEX mode, we need to add 2 x 49.9ohm pull down resistor close to REFCLK balls of AM64.

    Yes. The PCIe Card Electromechanical spec requires than any required REFCLK terminations be placed on the system board.

    In case of ENDPOINT mode, these resistors must be removed.

    Yes. Technically REFCLK terminations are not *prohibited* on an add-in card, but (paraphrasing from the same spec on this topic) "the same measurement techniques can be used as specified in that section, (double) receiver termination will reduce the nominal swing and rise and fall times by half. The low input swing and low slew rates need to be validated against the clock receiver requirements as they can cause excessive jitter in some clock input buffer designs.". TI doesn't characterize such a double-terminated REFCLK so we cannot support it.

    Futhermore, is there any need to add serial resistor into REFCLK path?

    Yes, these are recommended to reduce debouncing. Some tuning of the specific value may be needed for a specific board design, but we use 33 Ohm (R652/R653) and find it to be sufficient for most implementations.