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AM625: Signal format at DSS parallel interface (DISPC VP2)

Expert 2851 points

Tool/software:

Hi

May I have qustion about AM625x DISPC VP2?

I think this port supporting 24, 18,...-bit parallel display interface.

Question1

If useing 24-bit mode, the LSB is VOUT1_DATA[0]? or VOUT1_DATA[23]?

Question2

If set 24-bit mode, and not use low 6-bit, it be allowed?

Processor side set as 24-bit mode, but Display side use 18-bit.

Question3

If useing 18-bit mode, it may be unconnected DATA[23:18].

Is this mean DATA[23:18] was LSB in 24-bit mode? (signal is same as 24bit mode?)

Or hardware will shift 6-bit such as DATA[23:6](@24-bit mode) shift to DATA[18:0] ?

Thanks,

GR