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DDR SDCR.DDRDRIVE and memory's output Drive Strength

JOSE MARCHETTI
Prodigy 80 points

Hi,

We are using micron's MT47HxxM16 DDR memory and we are seeing overshoot and undershoot when the memory is driving the bus, overshoot and undershoot is not seen when the davinci (DM35x) processor is driving the bus. Currently there are 22R series termination resistors being used.

I would appreciate if someone could shed some light on following questions:

1) We are trying to play with the memory's output drive strength configuration, looking at the DDR-Memory-Controller-sprueh7d.pdf document it appears that that configuration is set in SDCR.DDRDRIVE bits 18 and 24. Problem is the MT47HxxM16manual only reports 1 bit for this setting, which is EMR (Extended Mode Register) bit 1. SDCR.DDRDRIVE bits is the correct configuration that will change DDR's output drive strength configuration ? If so, which bits in the SDCR register corresponds to the DDR EMR register ?

2)  I am confused about the BOOTUNLOCK description in the DDR-Memory-Controller-sprueh7d.pdf document : “Write a 1 to the BOOTUNLOCK bit 2”, but BOOTUNLOCK is located in SDCR bit 23, it is only 1 bit, how can I set bit 2 ?

Thanks!