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AM5748: IBIS question, how to select proper model for DDR drive strength?

Brad Caldwell
Genius 12595 points
Part Number: AM5748

Dear Champs,

We're running some simulations on an am5748 board design. Specifically, we're interested in the DDR signals. If you look in the IBIS model file TI provides, for example look at DDR1_A6 pin, it's defined as...

AG23     DDR1_A6              Selector_15  0.527210000000000000 0.000000003212000000 0.000000000001560000

If I then scroll down further and find the definition for Selector_15, it looks like this...

|*****************************************************************************************
|     Usage OUTPUT#1.35/1.5/1.8###DDR_SEIOPB_V.PAD
|     Base model DDR_SEIOPB_V
|*****************************************************************************************
[Model Selector] Selector_15
SR011_DRV48_1P8_M#473 I/O,1.8V,SR011_DRV48_1P8
SR010_DRV48_1P8_M#474 I/O,1.8V,SR010_DRV48_1P8
SR101_DRV48_1P8_M#475 I/O,1.8V,SR101_DRV48_1P8
SR100_DRV48_1P8_M#476 I/O,1.8V,SR100_DRV48_1P8
SR110_DRV48_1P8_M#477 I/O,1.8V,SR110_DRV48_1P8
SR111_DRV48_1P8_M#478 I/O,1.8V,SR111_DRV48_1P8
SR001_DRV48_1P8_M#479 I/O,1.8V,SR001_DRV48_1P8
SR000_DRV48_1P8_M#480 I/O,1.8V,SR000_DRV48_1P8
SR011_DRV40_1P8_M#481 I/O,1.8V,SR011_DRV40_1P8
SR010_DRV40_1P8_M#482 I/O,1.8V,SR010_DRV40_1P8
SR101_DRV40_1P8_M#483 I/O,1.8V,SR101_DRV40_1P8
SR100_DRV40_1P8_M#484 I/O,1.8V,SR100_DRV40_1P8
SR110_DRV40_1P8_M#485 I/O,1.8V,SR110_DRV40_1P8
SR111_DRV40_1P8_M#486 I/O,1.8V,SR111_DRV40_1P8
SR001_DRV40_1P8_M#487 I/O,1.8V,SR001_DRV40_1P8
SR000_DRV40_1P8_M#488 I/O,1.8V,SR000_DRV40_1P8
SR011_DRV34_1P8_M#489 I/O,1.8V,SR011_DRV34_1P8
SR010_DRV34_1P8_M#490 I/O,1.8V,SR010_DRV34_1P8

... many more ...

My question is, what's the normal way to pick the right model within selector_15? Do we comment all of the SRxxx models out and only leave the one we want? Or is this normally done in the simulation tool on a pin-by-pin basis?

Thanks for your help

  • 0
    TI__Mastermind 26195 points
    Brad,
    thanks for your post, our response may be delayed due the holiday.
  • 0 in reply to Rogerio Almeida
    TI__Guru* 80310 points

    Brad, there should be some sort of model selector in your simulation tool to choose which model you want to use.  It shouldn't be necessary to edit the IBIS file

    Regards,

    James

  • 0 in reply to JJD
    TI__Genius 12595 points
    Thanks James,
    We did find where to set these in the tool. A couple follow-up questions if you don't mind. We're using DDR3L and want to pick the correct model(s). Can you clarify a couple things related to the IBIS sub-model names?

    Let's consider this one, SR111_DRV48_1P35_M#551 I/O,1.35V,SR111_DRV48_1P35

    1. For SR111, does the 111 correspond to the three slew rate control bits in the CTRL_CORE_CONTROL_DDRxxxx registers as described in the TRM section 18.4.6.10 Software Controls for the DDR2/DDR3 I/O Cells?

    2. For DRV48, does the 48 denote the impedance control in the same registers mentioned in 1. ?

    3. Related to 2., is there a reason why we don't have models for Imp80 and Imp60 but we do for Imp48, Imp40, and Imp34?

    Thanks,
    -Brad
  • 0 in reply to Brad Caldwell
    TI__Guru* 80310 points
    1. Yes
    2. Yes
    3. The other impedance values are there to support the all of the DDR types that the DDR controller supports. Since the AM57x only supports a subset of those (ie, only DDR3) the other impedance values should not be necessary for a DDR3 design.

    Regards,
    James
  • 0 in reply to JJD
    TI__Genius 12595 points
    Thank you. That answers my questions