How to configure L2 cache memory in C64x+ ?

Sandeep,

Welcome to the TI E2E forum. I hope you will find many good answers here.
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Configuring L2 Cache:
L2 is configured as SRAM (addressable internal memory).
L2 cache can be enabled in the program code by issuing the appropriate chip support library(CSL).
Additionally, in the linker command file the memory to be used as SRAM has to be specified.
Since cache cannot be used for code or data placement by the linker, all sections must be linked into SRAM or external
memory.

The linker command file for a configuration of 1792K SRAM and 256K-bytes cache is shown.

If DSP/BIOS is used, L2 cache is enabled automatically.
Refer this wiki page for configuring the cache using DSP/BIOS,
http://processors.wiki.ti.com/index.php/Enabling_64x%2B_Cache

Dear Sir,

Thank you for your assistance.
I am not using DSP BIOS. 

I used the same linker cmd file you sent and CSL commands written below -

CACHE_L2Size oldSize;
CACHE_L2Mode oldMode;

CACHE_enableCaching(CACHE_EMIFB_CE00);

oldMode = CACHE_setL2Mode(CACHE_L2_NORMAL);
oldSize = CACHE_setL2Size(CACHE_128KCACHE);

Is something wrong with my CSL instructions ?

If my instruction is wrong, then can you suggest me with more specific instruction/procedure to configure SRAM(0x00800000) as L2 cache and save data in the same. 

Still the data is getting saved in DDR2 memory ( 0x8000 0000).

http://processors.wiki.ti.com/index.php/Enabling_64x%2B_Cache - in this document they have given details about configuring external memory as cache using MAR registers. But not how to use L2 SRAM cache.

If you could help me ? :) 

 Thanking you,

Regards,

S Sandeep

Sandeep,

Your small pieces of code seems ok.
Note:
Data or code must be linked into L2 SRAM or External memory and then copied to L1 at run-time.

/* L1 and L2 Caching Memory area */
#define CACHE_MEM    (0xE0000000)
CACHE_L2Size    localSize[4];

/* make sure that L2 is turned off */
CACHE_setL2Size(CACHE_0KCACHE);
   
/* Array used for setting L2 cache size */
localSize[0] = CACHE_32KCACHE;
localSize[1] = CACHE_64KCACHE;
localSize[2] = CACHE_128KCACHE;
localSize[3] = CACHE_256KCACHE;
   
/* Set L2 cache in normal mode */
CACHE_setL2Mode(CACHE_L2_NORMAL);

/* set Mar bit for CACHE_MEM */
CACHE_enableCaching(CACHE_EMIFB_CE00);