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DDR3 to DDR3 via SRIO

Mark Samson
Intellectual 355 points

I'm trying to send data from a DDR3 module connected to a C6678 DSP to an another DDR3 module connected to a second C6678 DSP using SRIO.

After the first tests i haven't seen yet the correct data in the destination memory.

Another user suggested me that is a problem of Address remapping, 'cause the XMC MPAX Segment Registers works only for the eight cores and not for other peripherals inside the DSP

So i must use the MPAX REGISTERS FOR SES in the MULTICORE SHARED MEMORY CONTROLLER REGISTERS, right?

  • 0
    TI__Guru* 81335 points

    Hi Mark,

    1. Is your test code is based on TI example?

    2. What is the MCSDK version?

    Thanks. 

  • 0 in reply to Raja
    Intellectual 355 points

    Hi

    It's a project written by zero.

    I've tested separately the DDR3 modules and the SRIO interface and they both work fine

  • 0 in reply to Mark Samson
    TI__Genius 12805 points

    Dear Mark

    You may be right

    Table 7-51 of SPRS691E—March 2014  6678 User Guide shows that the SRIO has privilege ID of 9 when it access the memory.  So if the values of the MPAX registers were modified (either the CorePac  MPAX registers or the SRIO SES and SMS but not the same modifications) the SRIO may write (or read) to a different physical memory than what the CorePac looks.

    However, if the code uses the default setting of the MPAX registers this should not be the reason.

    And I do not think that the values of MPAX were changed between tests

    But there may be other reasons why you do not see it

    1.    Is the cache invalidated between tests?  If I understand what you write, you run the test multiple times, and the first time it worked, but not the second time (or the third). In that case I will check on the cache, better so, I will disable the cache to see if this has any effect.
    2. What type of SRIO you run?  Direct IO or type 9 or type 11?- Based on your description it looks like direct IO, is it true?
    3. What address of the DDR the SRIO you try to access?

    Ran

     

  • 0 in reply to ran35366
    Intellectual 355 points

    Hi ran.

    I've not executed the test multiple times with different result. Everytime the resultis the same and the data hasn't arrived in DDR3. So i don't think is a chace problem
    What i was saying is that i've done some other test separately for the part of code relative to the SRIO transmission (From L2 to L2) and it works... And i've done some other test only for writing and reading data in DDR3 and it works.
    So the routine of my firmware about the SRIO and the one about the DDR3 individually works fine

    About the SRIO i'm using DIRECT IO - STREAMING WRITE operations

    About the DDR3 i'm sending data to logical addresses from 0x80000000 to 0xFFFFFFFF that's are the first 2GB of space in my module

  • 0 in reply to Mark Samson
    Intellectual 355 points

    Ok, doing some other kind of test we've seen that apparently one of the 2 DDR3 module has had a fault and so is no longer working properly...

    I'll update about the problem as soon as we try a new DDR3 module

  • 0 in reply to Mark Samson
    TI__Guru* 81335 points

    Hi,

    Thank you for the update.