Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions

  • [FAQ] TDA4VM: How do I enable CAN channels on Gateway/Ethernet Switch/Industrial (GESI) expansion card when using J721E EVM from Linux A72?

    Part Number: TDA4VM How do I enable CAN channels on Gateway/Ethernet Switch/Industrial (GESI) expansion card when using J721E EVM from Linux A72?

  • [FAQ] How to set up an EtherCAT System with AM6xx MainDevice and AM64/AM243 SubDevice using CODESYS Development System

    Other Parts Discussed in Thread: UNIFLASH This FAQ walks the user through setting up an industrial networking EtherCAT system in CODESYS using an AM6xx MainDevice and one-or-more AM64x/AM243x SubDevice(s). Instructions are provided to set up MainDevice…

  • [FAQ] TDA4VM: OpenVX Host on R5F and node Target on A72 (Linux)

    Part Number: TDA4VM How to run OpenVX Host on R5F and a node to run on A72 (Linux) as target?

  • [FAQ] AM623: Decoupling caps on CAP_VDDSx

    Part Number: AM623 Champs, Customer's asking what will happen if the decoupling caps on the CAP* nets below are not installed correctly? Will the device's behavior be well defined in this case (i.e. fail to boot etc) or would it be more sporadic based…

  • [FAQ] AM6x: Yocto build "hangs" for hours with no progress - What's going on?

    (applicable to all TI Sitara and Jacinto devices such as AM62x, AM62Ax, AM64x, AM65x, and so on) Symptoms When doing a Yocto build as per SDK instructions for example of the SDK default image like this... MACHINE=am62xx-evm bitbake -k tisdk-default…

  • [FAQ] AM62A3-Q1: The MISO and MOSI of the SPI

    Part Number: AM62A3-Q1 Hi TI expert, The SOC AM62A define the standard SPI interface by SPI_CS, SPI_CLK, SPI_D0, SPI_D1. If our slave device need to get MISO and MOSI data line, how will we used the D0 and D1 data line. Dose it programable? Can…

  • [FAQ] AM625/AM623 Custom board hardware design – Reading DEVICE_ID and Unique SOC (CPU) ID

    I have the below queries regarding the DEVICS_ID Is there a device ID available that I can read? Can you guide me how to read the device ID? Is the ID unique for each device? Is there an ID that is unique to each device?

  • [FAQ] AM625: Crystal drive strength specifications

    Part Number: AM625 Hello, Do we have a specification on the max drive strength/ power that AM625 can drive for both the HF crystal as well as 32 KHz oscillator? I didn't see it specified in the data sheet and customer wants to make sure they're within…

  • [FAQ] How to synchronize the PRU IEP timer with Linux system time?

    I am using a Sitara processor with a Linux core, a time sync router, and a PRU subsystem (AM62x, AM64x, AM65x). I want to synchronize the Linux system time with an IEP timer in the PRU subsystem. How do I do it? We will use AM64x for this example, but…

  • [FAQ] PROCESSOR-SDK-J7200: How to change/generate the “Eth” configuration for MCAL Ethernet Application from one core to other core.

    Part Number: PROCESSOR-SDK-J7200 Other Parts Discussed in Thread: DRA821 , DRA829 , SYSCONFIG How to change/generate the “Eth” configuration for MCAL Ethernet Application from one core to other core.

View FAQ threads
  • Threads 197913 Discussions