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Frequent questions

  • [FAQ]AM64X : How to Route MCU GPIO Interrupts to MAIN Domain Cores in MCU PLUS SDK Version 6.0 & above ?

    Part Number: AM6442 Other Parts Discussed in Thread: SYSCONFIG I am trying to modify the gpio_input_interrupt example for the R5F0-0 core to work with MCU_GPIO0 pins and run it on the R5 core from the CCS debug session, but for now unsuccessfully. …

  • [FAQ] AM64x Profinet: Component Placement Recommendation for SITARA MPU Memory

    Part Number: PROCESSOR-SDK-AM64X Other Parts Discussed in Thread: SYSCONFIG Hi, Can you please recommend how should I perform memory placement of various SW components when using Profinet - TSN on the AM64x processor.

  • [FAQ] How to update IDs (USB & PCIe PID/VID, MAC ID) by programming extended OTP on AM6x

    There are default ID values for the ID registers of USB, PCIe, MAC as listed in the TRM: - PCIe CTRLMMR_PCI_DEVICE_ID0, CTRLMMR_PCI_DEVICE_ID1 - USB CTRLMMR_USB_DEVICE_ID0, CTRLMMR_USB_DEVICE_ID1 - MAC CTRLMMR_MAC_ID0, CTRLMMR_MAC_ID1 The default ID…

  • [FAQ] How to program the extended OTP efuse on AM6x SoC

    Part Number: PROCESSOR-SDK-AM62A K3 SoC (AM64x, AM62x, AM62A...) have a set of One-Time Programmable (OTP) efuses: 1. The user's secure root key set to support Root-of-Trust (RoT) secure boot 2. The extended OTP efuse for general purpose usage by user…

  • [FAQ] How to generate Linux Appimage for Linux SBLs in MCU+ SDK

    Devices covered: AM64x, AM62x, AM62A The Linux SBLs from the MCU+ SDK support booting the Linux from PSDK. These Linux SBLs require a Linux Appimage to boot the Linux. It is noted that this Linux Appimage is generated using the ATF, OPTEE and A53 U…

  • [FAQ] TDA4VM: How to inference/benchmark on TDA4VM SoC with precompiled model artifacts using edgeai-benchmark repo ?

    Part Number: TDA4VM Hi, How to benchmark Object Detection, Classification and Segmentation models which are part of edgeai-benchmark repos on target SoC ? What KPIs are supported for benchmarking model on target SoC ? Thanks for the help.

  • [FAQ] AM623: unused pin boundary scan function

    Part Number: AM623 Hi, We don't need CSI in our design and from the AM62x Schematic Review Checklist: For specific guidance on certain unused pins, see the Pin Connectivity requirements section in the AM62x Sitara Processors Data Sheet. We see…

  • [FAQ] Sitara MPU Hardware Applications Support - Schematics review request

    Other Parts Discussed in Thread: AM62L Hi TI Experts, I have a customer schematic for review. Could you help me understand the below: 1. Can i share the schematics for review over E2E 2. If not, help me understand the Schematics review request process…

  • [FAQ] AM625: How to boot with eMMC boot mode on AM62x

    Part Number: AM625 This FAQ shows how to boot with eMMC boot mode on AM62x. Due to some recent issues with eMMC boot mode on AM62x such as: - Error flashing the rootfs to eMMC UDA partition in Linux kernel - Error booting from eMMC hardware boot0 partition…

  • [FAQ] TDA4VM: How to port MCAL Ethernet Virtual Mac Application supported on MCU2_1 to MCU1_0?

    Part Number: TDA4VM How to port MCAL Ethernet Virtual Mac Application supported on MCU2_1 to MCU1_0?

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