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Part Number: AM623
Hi,
We don't need CSI in our design and from the AM62x Schematic Review Checklist:
For specific guidance on certain unused pins, see the Pin Connectivity requirements section in the AM62x Sitara Processors Data Sheet.
We see…
Other Parts Discussed in Thread: AM62L Hi TI Experts,
I have a customer schematic for review. Could you help me understand the below:
1. Can i share the schematics for review over E2E
2. If not, help me understand the Schematics review request process…
Part Number: AM625 This FAQ shows how to boot with eMMC boot mode on AM62x. Due to some recent issues with eMMC boot mode on AM62x such as: - Error flashing the rootfs to eMMC UDA partition in Linux kernel - Error booting from eMMC hardware boot0 partition…
Part Number: AM6442 Hi,
There is a concern around running GPIO Input Interrupt MCU PLUS SDK example on AM64x. One might get an error message saying: MAIN_Cortex_R5_0_0] [Error] Sciclient event config failed!!! ASSERT: 0.12970s: syscfg/ti_drivers_config…
Part Number: J7200XSOMXEVM
The default console used by the TI keywriter is MCU_UART. In case that MCU_UART is not brought out on the custom boards how can we switch the keywriter console to other UART instances for example MAIN_UART0
Part Number: J784S4XEVM
By default, the second PCIe slot is not configured for PCIe root complex mode from the SoC-side, meaning if we wanted to connect an end point device like a NVMe SSD card, the link does not go up.
When connecting a NVMe SSD…
Other Parts Discussed in Thread: SYSCONFIG Hi,
I want to use resource partitioning tool but I don't know how to get started ?
This FAQ covers up to SDK 8.6. For an FAQ that covers SDK 9.0 & 9.1, please see e2e.ti.com/.../faq-how-to-use-k3-resource…