Frequent Questions

  • [FAQ] AM64x, AM65x RT Linux SDK 8.6: PRU Ethernet link down causes kernel crash

    Part Number: PROCESSOR-SDK-AM64X Problem I am using RT Linux SDK 8.6 with either AM64x, or AM65x. When I do a link down with PRU Ethernet, there is a kernel crash. Sample terminal output #1 root@AM64x-CustomerBoard:~# ifconfig eth2 down [ 28…

  • [FAQ] BQ24105: Why does the battery charger's output voltage and current show several pulses before charge termination?

    Part Number: BQ24105 Other Parts Discussed in Thread: BQ24115 , BQ24171 , , BQ24125 , BQ24172 A block diagram of the BQ24171, BQ24172, BQ24105, BQ24115, BQ24125 connection to the battery is shown below: The charge current flowing across the resistances…

  • [FAQ] LM2105: Half-Bridge Gate Driver Minimum Current Calculator

    Part Number: LM2105 Hello, I wanted to attach a file to help calculate the minimum drive current needed for Half-Bridge gate drivers: Half Bridge Minimum Drive Current Calculator.xlsx This file will allow users to input their circuit parameters…

  • [FAQ] TDA4VM: How to get CPSW Ethernet Statistics on TDA4/DRA8 devices?

    Part Number: TDA4VM Other Parts Discussed in Thread: DRA821 , , TDA4VH , DRA829 I need to see Ethernet statistics for CPSW on TDA4/DRA8 devices for debugging. Is there any way for me to read them?

  • [FAQ] TI-API: v2 Backlog order/order change API error codes and meanings (part 1 of 2)

    What do the v2 order and order change API error codes mean?

  • [FAQ] UART RX ms-level timeout realization based on Event for MSPM0

    Other Parts Discussed in Thread: MSPM0L1306 The timeout function on MSPM0G or MSPM0L UART can't reach ms level. Here is an example to realize it based on 1 UART, 1 Timer, 2 DMA. Here is the blockdiagram. The key point is that it doesn't use UART R…

  • [FAQ] AM625 / AM623 / AM620-Q1 / AM625-Q1 / AM625SIP Custom board hardware design – I2C interface

    Other Parts Discussed in Thread: AM62P , AM62A7 , AM620-Q1 , AM625 , AM623 , AM625-Q1 , AM625SIP , AM62A3 , AM6442 , SK-AM64B , TMP1075 Hi TI Experts, I have the below queries regarding the I2C interface: Need information on the number of I2C interfaces…

  • [FAQ] SN74LV4T08-Q1: Benefits of logic with integrated single supply level translation (LVxT) in wettable flank QFN packages

    Part Number: SN74LV4T08-Q1 Background: The growing need for level translation in automotive applications As microcontrollers and processors have moved towards lower supply voltages (Vcc), there has been in increase in demand for level translators…

  • [FAQ] TI-API: v2 Backlog quote API error codes and meanings (part 1 of 2)

    Part Number: TI-API What do the v2 quote API error codes mean?

  • [FAQ] TMS570LC4357-EP: What is meant by this reference to "1024 Off-Chip Channels"?

    Part Number: TMS570LC4357-EP The smnu563a (Tech Ref Manual) refers to "1024 Off-Chip Channels" for ADC. I don't see any other references for this. Is this just referring to handling SPI/I2C based external ADC chips, or is there some additional capability…

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