The idea of p0_r60_b7 is to be able to transfer data between both miniDSP_A and miniDSP_D by making sure that both are locked together.

Whenever p0_r60_b7 = 1:

- DAC_CLK value is automatically forced to be used instead of NADC divider output (ADC_CLK). This ensures that miniDSPs have the same clock source. This is similar behavior as if NADC divider is shut down when p0_r60_b7 = 0, but is performed automatically when p0_r60_b7 = 1.

- The user must program IADC = IDAC = MDAC*DOSR = MADC*AOSR.

- To power the miniDSPs

  1. Power up ADC channel first at p0_r81_b7-6 (ADC will remain powered down until DAC is powered).
  2. Power DAC at p0_r63_b7-6.
  3. Power-up NDAC divider.

- To power down miniDSPs (failure to follow correct order will keep miniDSP_A running).

  1. Ensure p1_r59_b7 = '0' and p1_r60_b7 = '0' and then power down ADCs at p0_r81_b7-6.
  2. Power down DACs at p0_r63_b7-6.
  3. Power down NDAC divider

Whenever p0_r60_b6 = 1:

- miniDSP_D will be powered automatically when miniDSP_A is powered at p0_r81_b7-6. However, the DAC channel will be muted (e.g. nothing will play out of the interpolator output).

- If audio playback is desired, then the DAC must be powered up at p0_r63_b7-6.