For example in the datasheet of OPA837 it is mentioned as follow:
This raise the following question for me:
- Do we need to just remove the GND and PWR plane just underneath the inverting pin and output pin? or also we need to remove the GND and PWR underneath the feedback trace as well?
- My second question would be if we need to remove the GND and PWR plan under the feedback trace as well then we can make another critical problem related to signal integrity. As a general rule for high speed PCBs we need to provide a solid GND plan underneath the signal traces, otherwise it can cause signal integrity issue:
Thanks in advance for your answers and helps: