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PCM1863: L/R ch CMRR difference

Kevin Huang8
Genius 3955 points
Part Number: PCM1863
Other Parts Discussed in Thread: TAS5825M, TAS3251

Hi Team,

We found that PCM1863 2 Channel CMRR is some different (pin
30, Pi28/Pin29, 27) is connected to TAS5825M,

Have 2Pcs L/R within 1dB, but other 2Pcs PCM1863 L/R is 8dB just one is R Channel is relatively poor, the other L

Channel is worse,
So we A-B-A awap the PCM1863, and the characteristics changed after the test;
The Datasheet shows that the CMRR is 56dB. I would like to know what conditions were measured.

PCM1863.pdfTAS5825M.pdf At the same time, please help us to confirm if there are any suggestions for improvement of our line, thank you!

  • 0
    TI__Genius 13610 points

    Hello,

    Variation of 8dB of CMRR is not unexpected, and there is no conditions besides what it says in datasheet that I could provide that would help you.

    As for schematic PCM1863 it looks fine, though I am unsure why you have the diodes. For other schematic you would have to post in forum for that part.

    Best Regards,

    Carson

  • 0 in reply to Carson Allen
    Genius 3955 points

    Hi Team,

     But, For PCM1863 CMRR differences, attach circuit have big difference between each EV sample,some of prototypes are 55dB, and some are as low as 30dB,
    Whether it is related to the settings of the software,Please provide advice on how to produce CMRR when the left channel right channel is greater than 40dB. Thanks
    1863 sch.pdf

  • 0 in reply to Kevin Huang8
    TI__Genius 13610 points

    Hello,

    Could you tell me if you are using PGA/AGC during meaurments?

  • 0 in reply to Carson Allen
    Genius 3955 points

    Hi Allen,

    For PCM1863 CMRR differences, attach file for our circuit diagram.there is a big difference between each EV sample,some of our prototypes are 55dB, and some are as low as 30dB,
    Whether it is related to the settings of the software,Please give us advice on how to produce CMRR when the left channel right channel is greater than 40dB. Thanks!

    3365.1863 sch.pdf

  • 0 in reply to Kevin Huang8
    TI__Intellectual 2620 points

    Kevin,

    FYI, Carson is out of office until Friday and can get back with you at that time. 

    Thanks,

    Brian

  • 0 in reply to Brian Donoghue
    Genius 3955 points

    Hi Carson,

    For PGA/AGC measure answer as below.

    The current PGA L/R setting is -1.5dB, AGC is disabled,
    Tried PGA to 10.5dB,
    CMRR is improved,
    But the SNR is worse,
    so cannot use it method,
    Any other suggestions to test?

  • 0 in reply to Kevin Huang8
    TI__Mastermind 19895 points

    Hi Kevin.

    thank you for this information. Carson is back in the office tomorrow and we will look deeper into this for you.

    Regards,

    Arthur

  • 0 in reply to Kevin Huang8
    TI__Genius 13610 points

    Do you get any better consistency for A-B-A swaps when setting PGAs to unity gain?

  • 0 in reply to Carson Allen
    Genius 3955 points

    Yes, I have done A-B-A interchange test, the phenomenon follows PCM1863

  • 0 in reply to Kevin Huang8
    TI__Genius 13610 points

    Over what size lot of chips are these being tested from?

  • 0 in reply to Carson Allen
    Genius 3955 points

    Hi Team,

    Input 100mV 100Hz; 

    What is the datasheet CMRR test condition? would you help provide suggest?

    customer test condition is  I2S output to TAS3251 4ohm/2V/1W

  • 0 in reply to Kevin Huang8
    TI__Genius 13610 points

    Hello,

    I would use 100mV and 1kHz frequency with no gain set.

    Carson

  • 0 in reply to Carson Allen
    Genius 3955 points

    Hi Carson,

    For Input 100mV 100Hz; condition, 

    Our current test results are that there are 38dB for L channel, 52dB for R channel, 49dB for L channel, and 26dB for R channel.
    The same PCB will have too much difference CMRR result.
    Will be cannot grasp the specifications during mass production.
    Attach our software settings and hardware circuits,
    Is a limit that cannot be improved?
    please reply as soon as possible, thank you!

    ADC1863.pdf

  • 0 in reply to Kevin Huang8
    TI__Genius 13610 points

    Hello,

    I will look this over.

    How are you measuring the CMRR in your case?

    Best Regards,

    Carson

  • 0 in reply to Carson Allen
    TI__Genius 13610 points

    Could you do -6dBFS input( ~1V for SE or ~2V for differential) instead of only 100mV and remeasure. Also please describe the process you are measuring with?

  • 0 in reply to Carson Allen
    Genius 3955 points

    Hi Carson,

    The additional file is the 2V test data,
    and the test results of different inputs of 200mV are attached.
    What other test items need?
    In addition, We have a desoldering PCM1863 exchange between the two PCBs,Low CMRR issue is follows IC,
    how to ensure that the CMRR test SPEC is greater than 40dB of the software and hardware setting method,
    if it is really not possible, please let us clearly explain, thank you.

    R403_CMRR_200mV_Diff_100Hz.pdfR403_CMRR_2V_Diff_100Hz.pdf

  • 0 in reply to Kevin Huang8
    TI__Genius 13610 points

    Hello,

    I will take a look at this but expect delay response due to Thanksgiving holiday. We thank you for your patience.

    Best Regards,

    Carson

    LPA Applications Engineer

  • 0 in reply to Carson Allen
    TI__Genius 13610 points

    Hello

    Please read below 

    There are a few things that may affect the CMRR. The measurement snapshots you show from the audio precision show it’s using an analog in to analog output signal path. From your schematics it looks like the output of the ADC is going to a TAS5825 power amp. If you measure CMRR with that amp in the path, then you are not going to get an accurate measurement as we do not know what noise and distortion is getting added by the power amp. You should measure with analog input and I2S output directly to the APx. If you can’t measure the I2S directly, then maybe FFTs of the input and output signal would be helpful.

    Their schematic also shows some inputs are single ended and some are differential. For the single ended inputs the CMRR may not be possible to measure. The correct way is to connect the IN+ and IN- pins together directly to get the best CMRR result.

    Best Regards,

    Carson