TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Clock & timing

Clock & timing

Clock & timing forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Clock & timing support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search clock & timing IC content or ask technical support questions on everything from clock synchronizers and generators to clock buffers and timers. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.

Create system solutions with Clock Tree Architect.
Frequent questions
  • [FAQ] LMK5B33216: Determining impact of supply voltage noise and PSNR specification on output phase noise

    Timothy T
    Timothy T
    Part Number: LMK5B33216 This covers the math to simulate clock output phase noise noise as a result of voltage supply noise using PSNR and then creating a voltage supply noise mask based on your requirements. How to use PSNR data and input voltage…
    • 5 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?)

    Jennifer Bernal
    Jennifer Bernal
    Part Number: LMK5B33216 [DPLL Training Slides] The What-How of TI DPLLs_share, e2e.pdf
    • 5 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] PLLATINUMSIM-SW: PLL Training Material

    Dean Banerjee
    Dean Banerjee
    Part Number: PLLATINUMSIM-SW Attached is a detailed training on PLL Theory PLL Fundamentals Full Training (Public).pdf
    • 5 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] LMK5B33216: How to choose the loop bandwidth for your PLL

    Timothy T
    Timothy T
    Part Number: LMK5B33216 Here's some information on choosing a loop bandwidth for your PLL to optimize noise performance. The presentation starts with some general theory on noise and PLLs, discusses how to pick loop bandwidth for a "PLL/VCO optimized…
    • 5 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TLC555: What are the performance differences expected for TLC555 PCN 20231130002.1?

    Ron Michallick
    Ron Michallick
    Part Number: TLC555 Other Parts Discussed in Thread: , TLC3555-Q1 , TLC3555 Tool/software: PCN 20231130002.1 is the “Qualification of RFAB using qualified Process Technology, Die Revision, Datasheet update and additional Assembly Site/BOM options…
    • Answered
    • 10 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Does TI have crosses for obsolete Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987 as per the Product Discontinuance Notice issued by ADI on March 22, 2022?

    Vibhu  Vanjari
    Vibhu Vanjari
    TI’s wide portfolio of RF PLLs & synthesizers features devices that are potential crosses for Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987. With most of TI’s RF PLLs & synthesizers…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TPL5010: How to disable the watchdog function of TPL5010

    Dong Shen1
    Dong Shen1
    Part Number: TPL5010 Hi all, I am a FAE of TI,now my customer has a watchdog disabled problem, so I synchronously ask you for a solution: Problem Description: the customer's MCU wants to disable the watchdog function during the recording program…
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: How to connect the unused pins?

    Kia Rahbar
    Kia Rahbar
    When a pin on my clock buffer is not being used, what is the correct termination?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: Can my buffer handle an input while it is powered off?

    Aaron Black
    Aaron Black
    If my buffer is powered off can an input go into the device without damaging it?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: How to deal with the unused output differential pin in a RF synthesizer?

    Noel Fung
    Noel Fung
    I need single-ended output, how to deal with the unused output differential pin?
    • Answered
    • over 5 years ago
    • Clock & timing
    • Clock & timing forum
>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Not Answered

    Replace Renesas & SiTime Data Center PCIe Clocking Solutions with TI Buffers & Oscillators. 0

    472 views
    0 replies
    Started 2 months ago
    by CP Ong
  • Not Answered

    [FAQ] The What and How of TI DPLLs (What is a DPLL? How does a DPLL work?) 0

    942 views
    1 reply
    Latest 5 months ago
    by Timothy T
  • Not Answered

    LMK05318B: Compatibility with SI5395B 0

    16 views
    0 replies
    Started 21 hours ago
    by GAURAV UPADHYAY
  • Not Answered

    CDCVF25081: Power up time requirement and 25-ohm Damping Resistor 0

    38 views
    1 reply
    Latest 1 day ago
    by Connor Lewis
  • Answered

    CDCLVP111-EP: CDCLVP111-EP Weight 0

    31 views
    1 reply
    Latest 1 day ago
    by Connor Lewis
  • Not Answered

    CDCE6214: CDCE6124 syntonized clock servo 0

    167 views
    8 replies
    Latest 1 day ago
    by Jaryd Dukes
  • Not Answered

    LMK05318B: DPLL filter configuration 0

    89 views
    8 replies
    Latest 1 day ago
    by Connor Lewis
  • Answered

    LMK00804B-Q1: Regarding the VDDO pin configuration, specifically pins 11 and 15. 0

    30 views
    2 replies
    Latest 1 day ago
    by Behdad Abdollahi
  • Answered

    LMK04828: Maximum OSCin frequency 0

    69 views
    4 replies
    Latest 1 day ago
    by Kevin Savage
  • Answered

    CDCLVC1102: cdclvc1102 input capacitance 0

    22 views
    2 replies
    Latest 2 days ago
    by KARO AIVAZIAN
  • Suggested Answer

    LMK01020: Find solution for 8 independent output channels 0

    17 views
    1 reply
    Latest 2 days ago
    by Michael Srinivasan
  • Not Answered

    LMX2595: Capacitance of the charge pump output 0

    8 views
    0 replies
    Started 2 days ago
    by Dana Kintigh
  • Not Answered

    LMK03806: Programming of LMK03806 0

    41 views
    3 replies
    Latest 2 days ago
    by Jaryd Dukes
  • Not Answered

    LMX2492: LMX2492 - precise ramp synchronization / triggering 0

    9 views
    0 replies
    Started 2 days ago
    by Krzysztof Stasiak
  • Answered

    LMX2572: LMX2572: Allowable voltage drop during inrush 0

    174 views
    7 replies
    Latest 2 days ago
    by Andrew Williams
  • Not Answered

    LMX2594EVM: Dimensions and 3D model 0

    20 views
    0 replies
    Started 3 days ago
    by Idan Hamani
  • Not Answered

    LMK05318BEVM: spikes observed in the phase noise of 100 MHz output from LMK05318B eval board 0

    271 views
    16 replies
    Latest 3 days ago
    by Connor Lewis
  • Not Answered

    LMX2615-SP: VccVCO and VccVCO2 Current Draw 0

    10 views
    0 replies
    Started 3 days ago
    by Carl Spurgers
  • Suggested Answer

    CDCLVP1102: Need life cycle expectancy data for the below part numbers 0

    60 views
    3 replies
    Latest 3 days ago
    by Michael Srinivasan
  • Suggested Answer

    LMK6D: LMK6DA15625ADLFR enable pin 0

    21 views
    1 reply
    Latest 3 days ago
    by Michael Srinivasan
>