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Original question:

LMK04610: Can't generate Sysref Pulses while bypassing both PLL1 and PLL2

LMK04610: Single shot Sysref

Peter Scott
Prodigy 40 points
Part Number: LMK04610

I have a problem generating a single shot sysref from he lmk04610. I would like to use it in total bypass mode where we feed it with 491.2MHz on CLKIN0 and have it generate a single sysref (divide by 240) on outputs 3&4, and a divide by 4 (122.88MHz clock on clock out 5).

Depending on how we randomly click on TIC pro software i get two behaviors. Ether the sysref is a pulse train or it is not possible to trigger a sysref via a register write.

So I have a couple of basic questions

1: is there any requirement for either of the plls to be locked before sysref will work correcly?

2:Do you have a simulator for this pll , because TICs pro software lacks feedback as to what mode the device is in

Many thanks

  • 0
    Prodigy 40 points

    So after tiring a couple of hundred different configurations , i have sysref count is set to 1 (not continuous), the sync pin is disabled. If dig clock is enabled i get a pulse train on sysref. and if dig clock is not enabled I get nothing from sysref.

    Where is the implementation of dig clock described in the datasheet. it appears to just be something in tics pro?

  • 0 in reply to Peter Scott
    TI__Genius 12550 points

    Hi Peter,

    Would you be possible to share the TICS Pro configuration file using with your setup? It would be quick to look on the configuration and can support on this.

    Regards,

    Ajeet Pal

  • 0 in reply to Ajeet Pal
    Prodigy 40 points

    I replied via email but it seems that doesn't work. how can i send it to you?

    /Peter

  • 0 in reply to Peter Scott
    Prodigy 40 points

    Sure here it is

    full_bypass_not_working.tcs

    Also here is a difference between what we should have writing to the lmk and what was in the register

     

    at 0x06=>wrote 0x11, read back 0x1b

    at 0x6f=>wrote 0x02, read back 0x00

    at 0x8f=>wrote 0x40, read back 0x42

    at 0x9c=>wrote 0x03, read back 0x00

    at 0xbe=>wrote 0x00, read back 0x20

    at 0xf9=>wrote 0x06, read back 0x00

    at 0xfa=>wrote 0xa4, read back 0x00

     

    Also here is a screen shot of the sysref output channel 3&4 .

    If i change the sysref pulsnt  to 0 i get this

    Many thanks

    /Peter

  • 0 in reply to Peter Scott
    TI__Genius 12550 points

    Hi Peter,

    Thanks for sharing the config file. I don't see any issue in register settings but still not getting the SYSREF pulsed output.

    I need to check from design side and will get back to you. Please allow me some time to gather the details, as most of the members are OOO for new year vacations.

    Thanks for your understanding.

    Regards,

    Ajeet Pal