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CDCE949-Q1: Default mode

Jonathan Brodeur1
Prodigy 30 points
Part Number: CDCE949-Q1

Tool/software:

I would like to use the IC in default mode (no I2C communication) with clock input of 600kHz and 9 outputs at 600kHz.

It seems feasible from my understanding of the default mode.  The only thing that I'm not sure is about the PLL mode.  Spec said that there is no limitation on the minimum input clock frequency if the IC is configure in PLL Bypass Mode, is it really the case in the default mode ?


Thank you.

  • 0
    TI__Prodigy 570 points

    Hello Jonathan,

    Yes in default mode because the PLLs are being bypassed the input clock frequency is passed to the output and the limitations of the signal will be from the crystal.
    This setup would require a 600kHz crystal because the default mode is configured to source its reference from the crystal. This means that some of the limiting factors of this setup will be ensuring that the crystal specs are the same.

    Please let me know if you have any other questions or if you would like me to test in lab.

    Best Regards,
    Kyle Yamabe