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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83822I: Link up debug with DP83822

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822I: 822/826 Odd Nibble Detection disable for EtherCAT application

    Hillman Lin
    Hillman Lin
    Part Number: DP83822I For 822/826 PHYs, Odd Nibbles Detection register need to be disable in order to prevent unexpected link loss in EtherCAT application. DP83826PHY: Odd Nibble Detection could be disable by strap 1 CLKOUT/LED1 pin in enhanced…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Can Auto-negotiation link up with Force mode on 100mbps?

    Hillman Lin
    Hillman Lin
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83867E Other Parts Discussed in Thread: DP83869 The DP83867 and DP83869 both have the same Vdiff Upper and Lower Input Limits of: 100 mV and 800 mV
    • over 2 years ago
    • Interface
    • Interface forum
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View FAQ threads
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  • Answered

    DP83869HM: D83869HM internal WPU/PD value 0 Locked

    124 views
    1 reply
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DS10CP152: Input pins when unused 0 Locked

    205 views
    1 reply
    Latest over 3 years ago
    by David (ASIC) Liu
  • Suggested Answer

    TUSB320: Design clarification 0 Locked

    208 views
    3 replies
    Latest over 3 years ago
    by Malik Barton57
  • Suggested Answer

    THS8200: THS8200 output configuration 0 Locked

    252 views
    1 reply
    Latest over 3 years ago
    by Charles Tsai
  • Answered

    TUSB320: I2C DEBOUNCE register bit 0 Locked

    515 views
    7 replies
    Latest over 3 years ago
    by Toshiro Imi
  • Answered

    MAX3221: Communication Errors 0 Locked

    1619 views
    3 replies
    Latest over 3 years ago
    by Sam
  • Answered

    DS90UB953-Q1: Current Consumption at 832MHz 4 Lane 0 Locked

    108 views
    1 reply
    Latest over 3 years ago
    by Hamzeh Jaradat
  • Answered

    DP83867IS: D83867IS internal PU/PD value 0 Locked

    182 views
    4 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Suggested Answer

    TCA9539-Q1: What is the GPIO output state when I2C communication is abnormal disrupted? 0 Locked

    417 views
    3 replies
    Latest over 3 years ago
    by Clemens Ladisch
  • Answered

    TPD2EUSB30: Behavior at Zener Breakdown 0 Locked

    233 views
    2 replies
    Latest over 3 years ago
    by Shinichi Inoue
  • Suggested Answer

    TFP410-EP: TFP410MPAPREP's Ta 0 Locked

    171 views
    1 reply
    Latest over 3 years ago
    by David (ASIC) Liu
  • Answered

    DP83867IR: DP83867IR three-supply power-up sequence 0 Locked

    194 views
    4 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Not Answered

    TFP410-EP: TFP410MPAPREP's Ta 0 Locked

    198 views
    0 replies
    Started over 3 years ago
    by Yosuke Toriyama
  • Suggested Answer

    DP83TC811R-Q1: Impact on now following the power up timing 0 Locked

    1255 views
    17 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Not Answered

    DP83867CS: size-dependent packet loss with minimum IPG 0 Locked

    734 views
    8 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DP83822I: What is meant by turnarond time and Z in the diagram 0 Locked

    247 views
    7 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DP83TC811S-Q1: How to perform an eye pattern test on TRD port and is there any criteria such as pattern mask? 0 Locked

    265 views
    7 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Suggested Answer

    DP83TC811R-Q1: Bring up on custom board 0 Locked

    408 views
    12 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Answered

    DP83869HM: rbias sgmii fcs errors, not stable connection 0 Locked

    750 views
    15 replies
    Latest over 3 years ago
    by Kallikuppa Sreenivasa
  • Suggested Answer

    TPS25830A-Q1: Need suggestion on Auto-qual device 0 Locked

    208 views
    1 reply
    Latest over 3 years ago
    by Bob Ma
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