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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83822IF: Fiber Link Status

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Allison Noe
    Allison Noe
    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits

    Alvaro (Al-vuh-roe) Reyes
    Alvaro (Al-vuh-roe) Reyes
    Part Number: DP83867E Other Parts Discussed in Thread: DP83869 The DP83867 and DP83869 both have the same Vdiff Upper and Lower Input Limits of: 100 mV and 800 mV
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What capacitance should my ESD diode be?

    Ethan Sempsrott
    Ethan Sempsrott
    Other Parts Discussed in Thread: ESD2CANXL24-Q1 , ESD2CAN24-Q1 , ESD2CANFD24-Q1 , ESD122 What should be considered when selecting a diode with parasitic capacitance?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83825I: How to adjust the Output Differential Voltage (VOD) of the DP83825I

    David Creger
    David Creger
    4540.DP83825I VOD Adjustment.pptx
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TG720R-Q1: Why is my SGMII eye measurement distorted?

    Melissa Chang
    Melissa Chang
    Part Number: DP83TG720R-Q1 SGMII signal is high frequency low-voltage differential signal. Both layout design and measurements need to be accurate for good eye diagram capture. Common board design guidelines: 100ohms+/-10% differential traces…
    • over 2 years ago
    • Interface
    • Interface forum
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    DP83867E: Regarding the layout design of the DP83867E. 0 Locked

    374 views
    5 replies
    Latest over 1 year ago
    by David (ASIC) Liu
  • Suggested Answer

    DP83822H: DP83822 IC bootstrap configuration +1 Locked

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    Latest over 1 year ago
    by Shane Hauser
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    SN65ELT20: SN65ELT20D & SN65ELT21D 0 Locked

    533 views
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    Latest over 1 year ago
    by Jack Campbell
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    TCAN1043A-Q1: TCAN1043A-Q1 0 Locked

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    by Ethan Sempsrott
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    TCAN1043A-Q1: TCAN1043A-Q1 0 Locked

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    1 reply
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    by Ethan Sempsrott
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    TUSB216-Q1: Test Procedure to Construct USB High-speed Eye Diagram issue 0 Locked

    326 views
    1 reply
    Latest over 1 year ago
    by Ryan Kitto
  • Not Answered

    SN65DPHY440SS: Output trace 0 Locked

    276 views
    5 replies
    Latest over 1 year ago
    by David (ASIC) Liu
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    TPD3S713-Q1: Harman:TPD3S713 Protection Confirmation 0 Locked

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    TCAN1462-Q1: SW Driver (minimal support) for TCAN1462-Q1 0 Locked

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    Latest over 1 year ago
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    TUSB8042: TUSB8042 0 Locked

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    by Chauhan Mihir
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    by David Waier
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    by Zoe Bison
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  • Not Answered

    TUSB2036: Problem to use PORT1 as USB RNDIS support 0 Locked

    591 views
    12 replies
    Latest over 1 year ago
    by Brian Zhou
  • Suggested Answer

    TUSB4041I: Unclear requirements for power up sequence 0 Locked

    437 views
    7 replies
    Latest over 1 year ago
    by Brian Zhou
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    TLIN2029-Q1: the wake up signal from LIN bus 0 Locked

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    TCAN1057A-Q1: Measure the recessive to dominant transition 0 Locked

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