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AM2432: warm reset in watchdog

Moonil Heo
Intellectual 660 points
Part Number: AM2432
Other Parts Discussed in Thread: AM2434

Hi Expert,

In another thread below, I got the information that "warm reset" in watchdog is not supported in AM2432.

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1077458/am2432-watchdog-warm-reset-is-not-working/3997985?tisearch=e2e-sitesearch&keymatch=moonil#3997985

I would like to revisit this and ask your guide about how to trigger a warm reset when the watchdog timeout happened.

Can we expect all h/w peripherals will be initialized after this warm reset like any interrupt, Ethernet I/F and so on?

Can we use "Sciclient_pmDeviceReset()" in "sciclient_pm.c" for this?

I would appreciate it if you share your guide on how to achieve this reset function and an explanation about the scope of peripherals to be reset. Any relevant example code would be very helpful to me.

Regards,

Moonil

  • 0
    TI__Expert 6835 points

    Hello Moonil,

    I am creating an example code that uses the Watchdog timer interrupt example to create a warm reset. If I am not able to respond by the end of the day with the example code then I will give you a timetable for when you can expect the example code.  Can you confirm if you are wanting the watchdog timer to trigger a MAIN warm reset or an MCU warm reset? 

    Regards,

    Erik

  • 0 in reply to Erik Friedel
    TI__Expert 6835 points

    Hello Moonil,

    I was not able to write a code example today but a SW generated MAIN Warm Reset is done by writing 0b0110 to bits 0-3 of the Reset Control MMR. If you are able to create an interrupt based on the watch dog timer successfully, then you should be able to add to the interrupt service routine the ability to have a SW generated warm reset. It is important to note that the Reset Control MMR can't be written to unless the Partition 6 key are written to the lock 0 and 1 registers.  Hopefully this information can help you until I can provide a code example.  

    Regards,

    Erik

  • 0 in reply to Erik Friedel
    Intellectual 660 points

    Hi Erik,

    Thanks for your kind explanation.

    while waiting for your example, I tested simply calling "Sciclient_pmDeviceReset(0xFFFFFFFFU);" in the watchdog timeout interrupt routine. I was able to see SBL was reloaded in the log when this function was called, which means the system was restarted. is it correct?

    Please let me know your opinion about using "Sciclient_pmDeviceReset(0xFFFFFFFFU);". I am also looking forward to your example code.

    Regards,

    Moonil

  • 0 in reply to Moonil Heo
    TI__Expert 6835 points

    Hello Moonil,

    I was able to use "Sciclient_pmDeviceReset(0xFFFFFFFFU);" in the ISR and confirm that a MAIN warm reset had occurred by reading 0x00200000 for the memory address of 0x43018178. This memory address is for CTRLMMR_RST_SRC which is the register responsible for capturing the reason why a Warm and/or MAIN domain Power On Reset occurred.

    Does this function call in the ISR serve as an effective example for creating a SW MAIN Warm Reset based on the Watchdog Timer interrupt?

  • 0 in reply to Erik Friedel
    Intellectual 660 points

    Hi Erik,

    This "Sciclient_pmDeviceReset(0xFFFFFFFFU);" is working from watchdog ISR on EVM. So, I think we can use this approach on the real target board we are designing. I just wonder if there is any dependency on the H/W part. In case, can I ask you whether we have to consider any H/W reset logic for this reset api?

    Regards,

    Moonil

  • 0 in reply to Moonil Heo
    TI__Expert 6835 points

    Hello Moonil

    When Sciclient_pmDeviceReset() is called, the System firmware issues a Warm Reset to the MAIN domain by writing to the MAIN domain CTRLMMR_RST_CTRL Register.  All modules in the MAIN domain are reset except for reset isolated modules and MAIN domain CTRLMMR register bits which are only reset by a MAIN Power-on Reset.

    After the Warm Reset is de-assterted, the device will boot-up. During the device boot-up, the R5FSS will read the reset status and MCU active magic word registers and reconfigure the MCU domain/M4FSS processor accordingly. 

    If there is a need in your application for the MAIN domain Warm Reset signal as an output from the AM2434, use RESETSTATz which is the MAIN Domain warm reset status output.

    Does this answer your question?

    Regards,

    Erik

  • 0 in reply to Erik Friedel
    Intellectual 660 points

    Hi Erik,

    "reset isolated modules" seems to be complicated to me yet.

    What will be "reset isolated module of MAIN domain when we use "Sciclient_pmDeviceReset()"? Does it mean all of MCU domain?

    I would appreciate it if you share your knowledge on this.

    Regards,

    Moonil

  • 0 in reply to Moonil Heo
    TI__Expert 6835 points

    Hello Moonil,

    For a MAIN domain Warm Reset, the entire MCU Domain remains functional and is isolated from the Reset. Chapter 5.2.2.2.1.4 "MAIN PSC Information" of the TRM contains a table that lists all modules connected to the MAIN domain and whether the respective modules are reset isolated. This table shows that the only MAIN domain modules that are configurable to be Warm Reset isolated are PRU_ICSSG0, PRU_ICSSG1, and CPSW0. 

    In summary, A MAIN Domain Warm Reset only resets the non-reset isolated MAIN domain modules. The entire MCU Domain will remain functional and not reset. 

    Regards,

    Erik