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AM625-Q1: DDR4 not initializing- DDR Reset is never Released

Part Number: AM625-Q1
Other Parts Discussed in Thread: SK-AM62B-P1, AM625

Hi Team,

This is the Soc part no: AM6252ASGFHIAMCRQ1.

After proper Soc and DRAM (Part no: MT40A1G16TB-062EIT:F same as EVM SK-AM62B-P1) power up, DDR reset_n is not released and DRAM is unable to initialize.

In SDCARD boot mode- we get following k3_lpddr4_start Fail in Uart.(Image below)

UART Terminal

but the same sdcard image is working on EVM(SK-AM62B-P1) and booting to linux.

Properly VDD is ramping after stable VPP, but still Soc is holding the RESET low.(doubt which side(ddr or soc) its pulled low )

Unable to find the cause of DDR RESET_n 

Kindly Reply ASAP

Regards

Pawan

  • Pawan, can you add

    #define DEBUG

    to the very top (above all #include) of k3_ddrss.c.  This will give us a little more verbose debug statements.  

    Which SDK did you start with?  Linux or MCU+?  If linux, can you post the results of 'git diff' in u-boot.  I'd like to see what changes you have done bootloader.  If MCU+, can you post the changes you have made to the code?

    Is it possible to perform a warm reset on your board, and does it produce the same behavior?

    Regards,

    James

  • Hi James

    Sorry for the delay 

    Linux or MCU+

    We are using Linux.

    This will give us a little more verbose debug statements.  

    Did not get verbose after adding #define DEBUG in k3_ddrss.c. Don't know why ?

     

    If linux, can you post the results of 'git diff' in u-boot

    please find the changes made

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    diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c
    index 9146361b3a..b786329e41 100644
    --- a/board/ti/am62x/evm.c
    +++ b/board/ti/am62x/evm.c
    @@ -50,7 +50,7 @@ static struct gpio_desc board_det_gpios[AM62X_LPSK_BRD_DET_COUNT];
    #define board_is_am62x_skevm() (board_ti_k3_is("AM62-SKEVM") || \
    board_ti_k3_is("AM62B-SKEVM"))
    -#define board_is_am62b_p1_skevm() board_ti_k3_is("AM62B-SKEVM-P1")
    +#define board_is_am62b_p1_skevm() 1
    #define board_is_am62x_lp_skevm() board_ti_k3_is("AM62-LP-SKEVM")
    #define board_is_am62x_sip_skevm() board_ti_k3_is("AM62SIP-SKEVM")
    #define board_is_am62x_play() board_ti_k3_is("BEAGLEPLAY-A0-")
    @@ -191,16 +191,18 @@ static void setup_board_eeprom_env(void)
    if (do_board_detect())
    goto invalid_eeprom;
    - if (board_is_am62x_skevm())
    - name = "am62x_skevm";
    - else if (board_is_am62b_p1_skevm())
    + if (1)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    warm reset on your board, and does it produce the same behavior

    warm reset has same behaviour (Reset always low)

  • The #define DEBUG has to go at the very top of the file, above all the #include statements

    Also, ensure all voltage rails around DDR are correct:

    On the processor:

    VDDS_DDR = VDDS_DDR_C = 1.2V DDR4

    VDDA_DDR_PLL0  = Core Voltage (either 0.75V or 0.85V)

    (AM62x) VDDA_PLL0 = 1.8V

    On the memory:

    DDR4: VDD=VDDQ=1.2V, VPP = 2.5V, VREFCA = 0.6V

    Are you utilizing VTT termination regulator?  Ensure that is at the proper voltage when DDR initialization is being performed

    Regards,

    James

  • Sure James, we will make the suggested change and probing and get back to you soon.

    One more doubt, what does k3_lpddr4_start: Fail has to do with Board not having LPDDR4? (Our Board has only DDR4 ) ?

    Regards

    Pawan

  • Pawan, the k3_lpddr4_start function (as well as other functions) are part of the driver which supports both LPDDR4 and DDR4.  This is just a misnomer in the function name.  You will see certain parts of the driver where the functionality changes depending on whether you are using LPDDR4 or DDR4

    Regards,

    James

  • Hi James,

    Sorry for the delay.

    Thanks for suggesting, we found VDDA_DDR_PLL0 rail not connecting to Core voltage. We fixed it.

    now we are getting RAM initialized but board fails at below stage

    (Unable to import code with insert code so adding below)

    U-Boot SPL 2023.04-ti-gd2612223375a (Feb 01 2024 - 15:06:40 +0000)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
    SPL initial stack usage: 13392 bytes
    Trying to boot from MMC2
    Authentication passed
    Authentication passed
    Authentication passed
    Authentication passed
    Authentication passed
    Starting ATF on ARM64 core...

    NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
    NOTICE: BL31: Built : 15:06:40, Feb 1 2024

    U-Boot SPL 2023.04-ti-gd2612223375a (Feb 01 2024 - 15:06:40 +0000)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
    SPL initial stack usage: 1904 bytes
    i2c_write: error waiting for data ACK (status=0x116)
    pca953x gpio@22: Error reading output register
    Trying to boot from MMC2
    Authentication passed
    Authentication passed


    U-Boot 2023.04-ti-gd2612223375a (Feb 01 2024 - 15:06:40 +0000)

    SoC: AM62X SR1.0 HS-FS
    Model: Texas Instruments AM625 SK
    EEPROM not available at 80, trying to read at 81
    Reading on-board EEPROM at 0x51 failed -1
    DRAM: 2 GiB
    Core: 72 devices, 32 uclasses, devicetree: separate
    MMC: mmc@fa10000: 0, mmc@fa00000: 1
    Loading Environment from nowhere... OK
    In: serial
    Out: serial
    Err: serial
    EEPROM not available at 80, trying to read at 81
    Reading on-board EEPROM at 0x51 failed -1
    Net: eth0: ethernet@8000000port@1
    Hit any key to stop autoboot: 0


  • Looks like you still have code in there that reads an EEPROM to get board info (which is what we have on the EVMs).  You will need to remove that.  Please check https://dev.ti.com/tirex/explore/node?node=A__AS3yAWRDEB3oRrtGCnsJ7A__AM62-ACADEMY__uiYMDcq__LATEST for some guidance on this.  

    Regards,

    James

  • Hi James,

    Thank you so much. We will go through the documentation.

    Regards,

    Pawan