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Frequent questions

  • [FAQ] AM625: LFOSC usage in the device

    Part Number: AM625 Other Parts Discussed in Thread: AM62P , AM62A3 , AM62P-Q1 , AM62A7 , AM62A7-Q1 , AM62A3-Q1 Hi, I have a question from my customer for LFOSC (external 32.668kHz). According to datasheet section 7.11.4.1 Input Clocks / Oscillators, it seems…

  • [FAQ] AM625 / AM623 / AM625SIP / AM625-Q1 / AM620-Q1 / AM62A7 / AM62A3 / AM62P / AM62P-Q1 Custom board hardware design – EXTINTn pin pullup connection

    Hi TI Experts, I have the below queries regarding the use of EXTINTn pin. Termination recommendations when used. Termination recommendations when not used. Let me know your thoughts.

  • [FAQ] AM62A7, AM62A7-Q1, AM62A3, AM62A3-Q1 Custom board hardware design - FAQs related to Processor collaterals, functioning, peripherals, interface and Starter kit

    Other Parts Discussed in Thread: SK-AM62A-LP , AM62P , TMUX1308-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 Hi Board designers, Refer FAQs listed below related to custom board design for AM62Ax family of processors that could be used along with other available design…

  • [FAQ] AM625, AM623, AM625SIP, AM625-Q1, AM620-Q1 Custom board hardware design - FAQs related to Processor collaterals, functioning, peripherals, interface and Starter kit

    Other Parts Discussed in Thread: SK-AM62 , SK-AM62B-P1 , SK-AM62-LP , SK-AM62-SIP , SK-AM62B , AM62P , TMUX1308-Q1 , TPS65219 , AM620-Q1 , AM625 , AM623 , AM625-Q1 , AM625SIP Hi Board designers, Refer FAQs listed below related to custom board design for AM62x family…

  • [FAQ] AM625-Q1 / AM620-Q1 Custom board hardware design – Collaterals to Get started

    Part Number: AM625-Q1 Other Parts Discussed in Thread: SYSCONFIG , SK-AM62-LP , , AM620-Q1 , TPS65219 Hi TI Experts, Can you provide a List of collaterals that can be referred when starting a custom board hardware design.

  • [FAQ] TDA4VL: How to resolve NETDEV WATCHDOG: transmit queue timed out issue in Linux (A72) in case of SBL optimized boot flow?

    Part Number: TDA4VL How to resolve NETDEV WATCHDOG: transmit queue timed out issue in Linux (A72) in case of SBL optimized boot flow?

  • [FAQ] J784S4XEVM: MAIN_SPI5 How to test the RX/TX Loop back

    Part Number: J784S4XEVM How to test the RX/TX Loop back for MAIN_SPI5 which is brought out on the J26 header on the EVM?

  • [FAQ] AM625 / AM623 / AM625SIP / AM625-Q1 Custom board hardware design – Display Parallel Interface (DPI) 24-bit RGB

    Other Parts Discussed in Thread: AM625 , AM62P , AM62A3 , AM62P-Q1 , AM62A7 , AM62A7-Q1 , AM62A3-Q1 Hi TI Experts, I have the below queries regarding the DPII interface We want to use an RGB Display with AM625 Processor. It seems MIPI-DPI Interface of the processor…

  • [FAQ] TDA4VM: SDL BIST Example Application Failing on SDK 8.6

    Part Number: TDA4VM SDL BIST example application halts midway (at the PBIST failure insertion test for Main R5F 1) during execution and fails on SDK 8.6.

  • [FAQ] J721S2XSOMXEVM: How to change DDR frequency for J721E EVM, J721S2 EVM, and J784S4 EVM?

    Part Number: J721S2XSOMXEVM Other Parts Discussed in Thread: TDA4VL The TI SDK supports 4266 MTS by default for J721E/J721S2/J784S4. How can I change the DDR frequency?

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