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Frequent questions

  • [FAQ] Support Guidance for C5000 Digital Signal Processors

    Support Guidance for C55x, C54x, C5x Q: I’m developing an application based on TI’s C5000 family of digital signal processors. I have some questions and need some support. Can you help me? A: Thanks for reaching out. Links to active C5000 devices…

  • [FAQ] Where can I find development resources for AWS IoT?

    I want to develop an AWS IoT application on a TI device. Where can I find some good resources to help me get started?

  • [FAQ] RTOS: How do I make my custom SYS/BIOS library more debug friendly?

    Tool/software: TI-RTOS I have a customized SYS/BIOS project that I want to step through but the debug experience is not ideal. How can I make my library more debug friendly?

  • [FAQ] Davinci & Digital Media devices: Support Guidance: DM335, DM355, DM365, DM368, DM369, DM3725, DM3730, DM383, DM385, DM388, DM505, DM640, DM642, DM643, DM6431, DM6433, DM6435, DM6437, DM6441, DM6443, DM6446, DM6467, DM6467T,DM647, DM648, etc

    Other Parts Discussed in Thread: DM383 , DM8107 , DM385 , DM388 , DM505 , DM3725 , DM3730 Davinci & Digital Media devices: Support Guidance for DM335, DM355, DM365, DM368, DM369, DM3725, DM3730, DM383, DM385, DM388, DM505, DM640, DM642, DM643, DM6431…

  • [FAQ] RTOS: Why am I getting a GateMutex Assert in TI-RTOS?

    Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS On any device (Sitara, SimpleLink, TM4C, C2000, etc), I get the following runtime error in the console: ti.sysbios.gates.GateMutex: line 114: assertion failure: A_badContext: bad calling…

  • [FAQ] 66AK2H14: DDR3A vs. DDR3B and Cache Coherence on Keystone II devices

    Part Number: 66AK2H14 1. How to partition the DDR3A and DDR3B memory across the ARM and DSP cores in Keystone II devices? The EMIF for DDR3A being attached directly to MSMC has a number of advantages for both ARM and DSP cores: 1) It is closer …

  • [FAQ] 66AK2H14: MPAX FAQ

    Part Number: 66AK2H14 1. What's the difference between C66x XMC MPAX and MSMC MPAX in Keystone II devices? 2. If transferring data between DDR3A and L2 SRAM via EDMA in Keystone II, should MPAX setting be assigned with PrivID = 0? 3. Can MPAX translate…

  • [FAQ] TCI6638K2K: Support Guidance: TCI6638K2K, TCI6636K2H, TCI6630K2L , 66AK2L06

    Part Number: TCI6638K2K Other Parts Discussed in Thread: TCI6630K2L , 66AK2L06 , , TCI6636K2H , 66AK2H14 , 66AK2H12 , 66AK2H06 , 66AK2E05 Q: I’m developing an application based on TI’s TCI6638K2K or TCI6636K2H or TCI6630K2L or 66AK2L06 family of devices…

  • [FAQ] Linux/TDA2P-ACD: How to build a small rootfs

    Part Number: TDA2P-ACD Tool/software: Linux Hi I am looking at bare minimum steps required to build a rootfs of 20 MB size since I have a limited ROM size.Could you provide the necessary steps (probably the recipe file(.bb)) which can have minimum…

  • [FAQ] TMS320C5517: IDLE3 wake-up with INT0

    Part Number: TMS320C5517 The C55x CSL has an example that demonstrates waking-up the DSP core from IDLE3 via RTC. This is an example that demonstrates waking up from IDLE3 via the INT0 pin on the C5517 using the EVM5517. Instructions for running…

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