Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions

  • [FAQ] TDA4: How to validate SysConfig PinMux Tool outputs

    Other Parts Discussed in Thread: SYSCONFIG , TDA4VH TI’s SysConfig PinMux Tool is a GUI interface which allows the user to select the desired device pin configurations for their system. The SysConfig PinMux Tool outputs customer-selected configurations…

  • [FAQ] AM623: A few more questions about decoupling as I couldn’t find anything in the TI documentation regarding some pins of the AM62X:

    Part Number: AM623 Team, A few more questions about decoupling as I couldn’t find anything in the TI documentation regarding some pins of the AM62X: Do the following pins need their own decoupling capacitors (it doesn’t look like the TI EVM had…

  • [FAQ] TDA4VM: How to configure RGMII clock delay on J7 devices?

    Part Number: TDA4VM How to configure RGMII clock delay on J7 devices?

  • [FAQ] Where do the MAC addresses for AM62x and AM64x come from? How do I change the MAC addresses?

    Hi TI Expert, I am developing on an AM62x SKEVM and an AM64x EVM and I'm planning on using Ethernet. Where do the MAC addresses associated with the Ethernet interfaces on these EVMs originate from? How do I change the MAC addresses?

  • [FAQ] AM6442: How to Get R5F PRU Ethernet working alongside Linux A53

    Part Number: AM6442 Other Parts Discussed in Thread: TMDS64EVM , , SYSCONFIG I am using a Sitara processor with Linux cores, RTOS cores, and PRU_ICSSG cores (AM64x family). I want to use an RTOS core to control PRU_ICSSG cores, which are being used…

  • [FAQ] AM625 / AM623 / AM620-Q1 / AM62Ax / AM62Px / AM62D-Q1 / AM62L Design Recommendations / Commonly Observed Design Errors during Custom board hardware design – SK Schematics updates for Design Update Note

    Other Parts Discussed in Thread: SK-AM62B , SK-AM62B-P1 , SK-AM62-LP , SK-AM62-SIP , SK-AM62A-LP , SK-AM62P-LP , AM62L , SK-AM64B , AM6421 , AM6411 , SYSCONFIG , TPS65224 , SK-AM62 , AM3358 , AM3354 , AM2432 , ISO7741 , AM62P5-Q1 , AM62P , AM62A3-Q1 …

  • [FAQ] AM625: How do I modify the DDR memory footprint of the DM R5F?

    Part Number: AM625 I am using a processor with the device manager (DM) code running on an R5F (AM62x, AM62Ax, or AM62Px). I do not need any additional code running on the DM R5F. How do I modify the DDR memory that needs to be reserved for the DM R5F…

  • [FAQ] TDA4VL-Q1: How do I update the GPU driver on TDA4x devices?

    Part Number: TDA4VL-Q1 I need to upgrade the GPU driver as there are bug fixes and new features available in the latest release. How can I upgrade the driver in my system?

  • [FAQ] TDA4VL-Q1: What are the GPU driver bug fixes for SDK 8.6 or earlier?

    Part Number: TDA4VL-Q1 I am going into production on SDK 8.6 or earlier, but I have experienced a GPU driver bug. What is the latest GPU driver I can take to ensure I have all of the latest driver fixes and how do I install that driver into my system…

  • [FAQ] TDA4VL-Q1: J721S2XSOMXEVM: Routing PCIe reference clock externally

    Part Number: TDA4VL-Q1 Other Parts Discussed in Thread: TDA4VL , TDA4VM , J721S2XSOMXEVM Similar to TDA4VM, the TDA4VL supports multiple PCIe reference clock (refclk) configurations, where each of the SERDES reference clock can be supplied from either…

View FAQ threads
  • Threads 198576 Discussions