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Frequent questions

  • [FAQ] CCS/TDA4VM: How to view c6x trace buffer on Linux?

    Part Number: TDA4VM Tool/software: Code Composer Studio How to Debug/view the contents of c6x trace buffer in CCS? In the absence of CCS how to view the trace buffer from Linux side?

  • [FAQ] TDA2x: How to flash images to the QSPI memory from the u-boot prompt in vision SDK Linux?

    Hi, The use-guide (file::/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/docs/Linux/VisionSDK_Linux_UserGuide.pdf) has steps to flash the images to QSPI memory from the host machine, for this we need to connect a USB cable from P2/USB1 to host PC. This…

  • [FAQ] TDA4VM: How to do a run time logging of events in an OpenVX application using OpenVx Performance Analyzer?

    Part Number: TDA4VM I want to do some kind of even logging in my OpenVX application to look for possible bottlenecks in execution, is there a way I can do that? I'm using PSDKRA 7.0.

  • [FAQ] TDA2x: Multi channel support for NullSrc link running on A15 Linux in vision SDK

    As of now NullSrc link supporting only a single channel, so can I know the changes for multi-channel support?

  • [FAQ] TDA2x: How To – Modify 512MB Bios Memory map to 1GB Bios Memory map in vision SDK?

    The steps are given in the "vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf"( chapter 6.5 How To – Modify 512MB Bios Memory map to 1GB Bios Memory map ) are not working in the latest SDK & not able to increase the "SR1_FRAME_BUFFER_SIZE…

  • [FAQ] TDA2x: How can I set the IPU1_0 as the Primary core in Vision SDK?

    Hi, By default primary core is IPU2 in vision-SDK(Bios) + Linux(A15), So what are the steps to set IPU1_0 as a primary core?

  • [FAQ] TDA4VM: How to get CPSW9G virtual interface functional on TDA4x/DRA8x SDK versions 7.0 onward?

    Part Number: TDA4VM When I build EthFw on SDK 7.0, I don't see the CPSW9G virtual interface on Linux coming up. This was functional in previous SDK 6.2. What changed in SDK 7.0?

  • [FAQ] TDA4VM: how to configure C7x DSP frequency to match different TDA4VM variant

    Part Number: TDA4VM Hi, expert: From clock tree tool, the MAIN_PLL7_HSDIV0_CLKOUT is 1000MHz for superset. But my customer is using a TDA4VM variant which C7x is supposed to run at 200MHz. Here are my questions: MAIN_PLL7_HSDIV0_CLKOUT: this…

  • [FAQ] CCS/TDA4VM: Pinmux Guide for Jacinto Processors

    Part Number: TDA4VM Other Parts Discussed in Thread: DRA829 , Tool/software: Code Composer Studio How to configure pinmux for peripherals using the below methods: 1) Pinmux tool. 2) Manually looking at the data sheet.

  • [FAQ] Why am I getting a build error with TI-RTOS (SYS/BIOS)?

    What are the common reasons for getting a build error with TI-RTOS (SYS/BIOS)?

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