Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions

  • [FAQ] SYSFW symmetric keyring import and applications on AM64x

    Part Number: AM6442 SYSFW/TIFS adds the new feature on symmetric keyring import in TIFS 12.0.2 release https://software-dl.ti.com/tisci/esd/latest/6_topic_user_guides/keyring.html https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/security/keyring…

  • [FAQ] TDA4VM-Q1: How to configure MCAN hardware message ID filters on A72 Linux

    Part Number: TDA4VM-Q1 Other Parts Discussed in Thread: AM68 , TDA4VM , AM69 , TDA4VH , AM67 How can I configure MCAN hardware message ID acceptance filters from Linux (A72) so that the CAN controller discards unwanted IDs before they reach the socket…

  • [FAQ] TDA4AEN-Q1: Steps to Load and Execute a Standalone Binary on J722S EVM via CCS

    Part Number: TDA4AEN-Q1 Other Parts Discussed in Thread: AM67 Hi Team, What are the steps required to load, run, and debug a standalone application on a J722S EVM using Code Composer Studio (CCS), including hardware setup, target connection, executable…

  • [FAQ] TDA4AEN-Q1: How to set up the C7x LUT (C7100/C7120) and ILUT (C7524), with examples and build steps

    Part Number: TDA4AEN-Q1 Other Parts Discussed in Thread: AM67A , SYSCONFIG How do I configure and use the C7x DSP LUT (C7100/C7120) and the ILUT (C7524), including example code, how to build it on the target, and how to measure performance?

  • [FAQ] TDA4VH-Q1,TDA4VE,TDAVAL,TDA4VL,TDA4VP-Q1,TDA4AP-Q1: How to Enable Temperature driven Dynamic Refresh rate adjustment?

    Part Number: DRA821U-Q1 How to Enable Temperature driven Dynamic Refresh rate adjustment for DDR?

  • [FAQ] AM62A7: DCC, SDL Clock Configuration

    Part Number: AM62A7 Other Parts Discussed in Thread: SYSCONFIG , AM62A3-Q1 How to configure clock source for DCC Safety Diagnostic ?

  • [FAQ] DRA821U-Q1: USXGMII +PCIE SUPPORT ON MAIN CPSW5G: J7200 EVM

    Part Number: DRA821U-Q1 How to enable USXGMII + PCIE on MAIN CPSW5G in J7200 EVM ?

  • [FAQ] AM2754-Q1: AUDIO-AM275-EVM: McASP4 signals not appearing on J28 connector

    Part Number: AM2754-Q1 Other Parts Discussed in Thread: AUDIO-AM275-EVM , TXB0108 , TCA6416 I am trying to use McASP4 pins on the J28 User Expansion Connector on the AUDIO-AM275-EVM board. I have configured the syscfg for McASP4 and built my firmware…

  • [FAQ] AM625: McASP0 / SPI2 Signals Not Accessible on User Expansion Connector — AM62x-SIP-SK

    Part Number: AM625 Other Parts Discussed in Thread: SYSCONFIG I am trying to use the McASP0 (or SPI2) pins on the AM62x-SIP Starter Kit ( AM62x-SIP-SK ) board via the User Expansion Connector , but I am not getting any signals. My SysConfig pinmux looks…

  • [FAQ] AM620-Q1: Flash compatibility of xSPI boot in octal mode

    Part Number: AM620-Q1 The Sitara ROM Bootloader utilizes a specific parsing logic to validate the SFDP tables present in Serial Flash parts. Some Flash devices possess SFDP tables that do not support the specific sequences or configurations required…

View FAQ threads
  • Threads 204552 Discussions