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Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
    • 10/25/2022
    • Colombo Carlo

    [FAQ] AM625: jtag schematics to implement in customer board

    Part Number: AM625

    Hi everybody , 

    customer  would like to have Jtag connections/capabilities on  their  production  board .

    I suggested  to copy  SK-AM62    but here are questions :  

    - do you need to implement  just page 29  ( so jtag connector )  ?   coudl you avoid  onboard  clock buffer ( to save money ) ?

    - is page 28  ( all buffers  )  needed at all ?

    - do you need if using 5V from PC  the   do we must pull USB_VBUS pin to 1.8V?

    please consider they are going to use XDS110  on their production board 

    I also suggested  schematics  as on web here https://dev.ti.com/tirex/explore/node?node=AOi9Jj0vmBMJ0KQKaKITgg__FUz-xrs__LATEST   

    but not 100% crystla clean what to do  

    thank you very much 

    BR
    Carlo

    PS  here you have  page 28 & 29  of SK-AM62  schematics  I m referring to ( page 28 is the one w the buffers )

    Processors forum Processors
    • 10/24/2022
    • Stephan BAW

    [FAQ] AM625: Disturance on OSPI CLK connected to SPI NOR

    Part Number: AM625

    We are facing problem when connecting a SPI Nor (W25Q128VEIQ) to OSPI CS0.

    Basically it is working but from time to time it comes to errors during SF PROBE command in u.boot.

    Please find attached the CLK Signal measured during sf probe.

    Do you have any advice why the CLK Singal has this strange shape?

    The CLK is running at 83.3Mhz

    Many thanks and best regards

    Stephan

    Processors forum Processors
    • 10/21/2022
    • Hamish Guthrie

    [FAQ] AM62x: How to customize eMMC and OSPI flash layout for SPL/u-boot booting with TI AM62x Linux SDK

    Part Number: SK-AM62

    I am attempting to boot the AM62x SK EVM from eMMC and OSPI. The board I have is revision PROC114E1.
    I am using the TI provided SD-Card image located here: https://dr-download.ti.com/software-development/software-development-kit-sdk/MD-PvdSyIiioq/08.04.01.03/tisdk-default-image-am62xx-evm.wic.xz
    I have tried locating the various bootloaders at different locations in both the OSPI NOR Flash and the first eMMC boot block, but it appears as though the recent changes in the SPL/u-boot offsets are applicable. I see from the sources that u-boot should be located at 0x280000 in the SPI NOR Flash, which would translate to sector 0x1400 in the eMMC boot block, however, I have been unable to determine at which offset the tiboot3.bin is expecting to find the SPL at from the sources. The documentation shows that it should be located at sector 0x400 in the eMMC boot block, https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/08_04_01_03/exports/docs/linux/Foundational_Components/U-Boot/UG-Memory.html, or offset 0x80000 in OSPI NOR FLash - https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/08_04_01_03/exports/docs/linux/Foundational_Components/U-Boot/UG-QSPI.html
    I have tried locating the SPL at both 0x80000 and 0x100000 in the QSPI NOR Flash, as well as a few other randomly selected offsets, but I never see any boot messages. I have also tried a few different locations in the first eMMC boot block. Of course for the eMMC boot I am using the appropriate DIP switch settings for the eMMC Boot Mode (as opposed to using MMCSD), however, I will try using filesystem mode with MMCSD and format the first part of the user area of the eMMC with FAT32 to see if I can get that to boot. I guess I could also try raw mode with MMCSD Boot Mode as well.
    I would be very grateful if someone could confirm for me where the tiboot3.bin is expecting to find the SPL in both OSPI and eMMC boot modes.
    Processors forum Processors
    • 10/19/2022
    • SeanHC Lin

    [FAQ] AM6412: Passing USB compliance test patterns trhough a USB 2.0 hub

    Part Number: AM6412

    Hi TI,

    I can generate USB compliance test patterns on AM64 SoC by the following command

    # devmem2 0x0f410480 w 0xA0
    # devmem2 0x0f410080 w 0x4
    # devmem2 0x0f410484 w 0x40000000

    However, the test pattern stops transferring before the GL852GT USB 2.0 HUB.

    I want to measure the signal at the USB connector behind the USB 2.0 HUB.

    They seem to be discarded by USB HUB.

    Could I tell the USB 2.0 HUB to forward the signal to port 1 by specifying the destination (downstream port) for the test patterns? 

    How do I get USB compliance test patterns to pass through the USB 2.0 hub to USB connector 1?

    Thanks,

    Sean

    Processors forum Processors
    • 10/14/2022
    • SeanHC Lin

    [FAQ] AM6412: USB compliance test pattern generation

    Part Number: AM6412

    Hi TI,

    How to generate USB compliance test from CPU In Linux kernel 5.10 on AM64xx.

    I followed the instructions below.

    TDA4VM: USB 2.0 host test mode

    Set dr_mode to host.

    # cat /proc/device-tree/bus\@f4000/cdns-usb\@f900000/usb\@f400000/dr_mode
    host

    # cat /proc/device-tree/bus\@f4000/cdns-usb\@f900000/usb\@f400000/compatible
    cdns,usb3

    Unbind the usb 2.0 hub befind CPU.

    # echo '1-1' > /sys/bus/usb/drivers/usb/unbind

    # lsusb -t
    /: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
    /: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M

    And, type the command to generate the test pattern.

    # echo compliance > /sys/kernel/debug/usb/xhci/xhci-hcd.1.auto/ports/port01/portsc

    # cat /sys/kernel/debug/usb/xhci/xhci-hcd.1.auto/ports/port01/portsc
    PORTSC = 0xc000e63
    Powered Connected Enabled Link:U3 PortSpeed:3 Change: Wake: WDE WOE

    However, The CPU doesn't seem to generate any signals.

    What are we missing here?

    Or, is there any other way to generate test patterns?

    Thanks,
    Sean

    Processors forum Processors
    • 10/12/2022
    • Emanuele Peruzzi

    [FAQ] SK-AM62: how to disable the HMI demo

    Part Number: SK-AM62

    Hello.

    i am working with linux arago default image for am62 evaluation board. I am trying to understand how reduce boot time, and get command prompt as fast as i can. 

    Just to have an idea of how to speed up this, i would like to avoid loading of hmi demo that is automatically loaded at startup. i have tryied the command

    sudo systemctl disable hmi_demo

    with no luck, can i have some hint?

    Kind Regards

    Emanuele Peruzzi

    Processors forum Processors
    • 10/3/2022
    • Parth Nagpal

    [FAQ] TDA4VM: PDK Interrupt registration for R5F using OSAL

    Part Number: TDA4VM

    This document is intended to explain the interrupt registration process for R5F cores used in TI PDK

    Processors forum Processors
    • 10/2/2022
    • RonB

    [FAQ] PROCESSOR-SDK-AM64X: AM64x/AM243x SR 2.0 Device Type Transition

    Part Number: PROCESSOR-SDK-AM64X

    If you you are having trouble booting an AM64x or AM243x based board with Processor or MCU+ SDK v8.4, please see the below information.

    Overview

    With the production release of Silicon Release 2.0 (SR 2.0) of the AM64x/AM243x product families, the default device type is changing from General Purpose (GP) to High Security – Field Securable (HS-FS). HS-FS devices allow customers to enable security (for example, secure boot) if/when needed in their development flows. This change better prepares AM64x/AM243x based designs to easily enable security in a world of connected devices, growing threats, and developing standards. SR 1.0 devices, which were pre-production, are most likely GP devices. Therefore, existing SR 1.0 designs in development will need to change to SR 2.0 material to go to full volume production. This guide provides a short overview of this process and pointers to additional information. For more information about the differences between SR 1.0 and SR 2.0, please see the AM64x/AM243x Processor Silicon Revision 1.0, 2.0.

    SR 1.0 GP devices and SR 2.0 HS-FS devices require different builds of the system firmware software component provided in AM64x/AM243x software packages (Software Development Kits). Software built for SR 1.0 GP devices will NOT boot on SR 2.0 HS-FS devices. The support for SR 2.0 HS-FS devices is added in the 8.4 version of the AM64x Software Development Kits (SDKs) and the AM243x MCU+ SDK. With this version, released at the end of September 2022, the system firmware can be built for both types of devices. Given their pre-production nature, support for SR 1.0 GP devices will be removed over time, and SR 2.0 HS-FS devices will be the only devices supported in the future.

    Starting with v8.4, the SDKs provide board binaries for TI Evaluation Modules (EVMs) and Starter Kits (SKs), as well as the ability to build the proper device type support for custom builds on either TI boards or custom boards. The default images provided with this SDK will not boot on SR 1.0 devices without slight modifications. Those interested in evaluating SR 2.0 and HS-FS will need to migrate from previous versions of the SDKs to this new version or later. With support for both device types, evaluation can continue on SR 1.0 GP devices and preparations can be made to switch to production SR 2.0 HS-FS devices with minimal changes. These changes are covered in detail in the Processor SDK for Linux migration guide, the AM64x MCU+ SDK migration guide, or AM243x MCU+ SDK migration guide.

    How to Determine Silicon Revision 

    Since it is necessary to know the silicon revision of the device(s) for which software is being built, here is some information to help determine the revision number of the targeted board or device. At a high level, the orderable part number (OPN) for the devices change from ‘A’ to ‘B’, and this is reflected on the part markings on the top of the device. The SR 1.0 devices also included an ‘X’ at the start of the part numbers. For example, an XAM6442A marked part is SR 1.0, and an AM6442B marked part is SR 2.0. More information is included below.

    TI Evaluation Modules 

    Like the devices, the OPNs for the evaluation modules (EVMs and Starter Kits (SKs)) are changing to reflect the change to SR 2.0. The OPN for the AM64x Evaluation Module is changing from AM64GPEVM to AM64EVM (note the ‘GP’ is removed) for SR 1.0 to SR 2.0. The Starter Kit (SK) OPN is changing from SK-AM64 to SK-AM64B. The OPN is printed on the top side of the board with a white label and black text next to an ‘OPN’ silkscreen. If the OPN on the board is not available, the part symbolization information below can be used to identify the device type.

    Device Nomenclature and Part Symbolization 

    As indicated above, the OPNs are changing from SR 1.0 to SR 2.0 and this change will be reflected on the part symbolization on top of the device as well. For a custom board, this marking will be the most reliable way to identify the silicon revision of the device on the board. More information about the device symbolization can be found in the AM64x SitaraTm Processors datasheet and the AM243x SitaraTm Microcontrollers datasheet.

    For reference, here is an example part symbolization for a SR 1.0 device:

    +-------------------+  \T/ = TI LOGO                                  
    |                   |  SITARA = MARKET IDENTIFIER                         
    | \T/      SITARA   |                                                        
    |                   |                                                        
    | XAM6442A          |  XAM6442A = PART NUMBER (Left Justified)                      
    | SFGGAALV          |  SFGGAALV = ADD ON MARKING (Left)                    
    | YMPLLLS           |                                                        
    | YYY     @  G1     |   YM = YEAR MONTH DATE CODE                     
    |                   |    P = SECONDARY SITE CODE FOR SCK              
    | O                 |  LLL = ASSEMBLY LOT CODE                        
    \-------------------+    S = PRIMARY SITE CODE FOR SCK                
      O - Pin 1            YYY = DEVICE IDENTIFIER                        
         (MARKED)            @ = 1 CHARACTER SUBSTRATE IDENTIFIER         
                                       S - SEMCO                              
                                       D - DAEDUCK                                                                        

                            G1 = ECAT; Must be symbolized with            
    a solid underscore  

    A few things to note:

    • Left justification for the part number
    • Part number start with an ‘X’
    • Part number ends with an ‘A’

    Here is an example part symbolization for a SR 2.0 device:

    +-------------------+  \T/ = TI LOGO                                   
    |                   |  SITARA = MARKET IDENTIFIER
    | \T/      SITARA   |                                                        
    |     AM6442B       |  AM6442B  = PART NUMBER (Centered)           
    |     SEFHAALV      |  SEFHAALV = ADD ON MARKING (Centered)           
    |     YMPLLLS       |                                                        
    |  YYY       G1     |   YM = YEAR MONTH DATE CODE                      
    |                   |    P = SECONDARY SITE CODE FOR SCK               
    |                   |  LLL = ASSEMBLY LOT CODE                         
    | O                 |    S = PRIMARY SITE CODE FOR SCK                 
    \-------------------+  YYY = DEVICE IDENTIFIER                         
      O - Pin 1             G1 = ECAT; Must be symbolized with             
         (MARKED)                      a solid underscore           

    A few things to note:

    • Center justification for the part number
    • Part number starts with an ‘AM’
    • Part number ends with an ‘B’

    Device Type Determination by Software

    It is also possible to determine the device type with software and output from the console UART port. These steps are documented in the AM64x Processor SDK Security documentation.

    Additional Resources:

    Processor SDK for Linux migration guide

    AM64x MCU+ SDK migration guide

    AM243x MCU+ SDK migration guide

    AM64x SR 2.0 Starter Kit (SK)

    AM64x SR 2.0 Evaluation Module (EVM)

    AM64x/AM243x Processor Silicon Revision 1.0, 2.0

    Processors forum Processors
    • 9/28/2022
    • Ranjeet Kumar

    [FAQ] 66AK2H12: How to create "Target configuration" and do "Test connection" on K2H EVM

    Part Number: 66AK2H12

    Hi, How to create "Target configuration" and do "Test connection" on K2H EVM ?
    Processors forum Processors
    • 9/28/2022
    • Ranjeet Kumar

    [FAQ] 66AK2H12: How to re-build the PDK and SDK of PROCESSOR-SDK-RTOS-K2H 6.3 for K2H?

    Part Number: 66AK2H12

    Hi,

    How to re-build the PDK and SDK of PROCESSOR-SDK-RTOS-K2H for K2H?

    Processors forum Processors
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