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LMK05318BEVM: Trouble with BAW Lock Frequency detect

Christian Sillans
Prodigy 50 points
Part Number: LMK05318BEVM

Hi Team,

I want to use the LMK051318b in order to synchronize remote system and regenerate the 10MHz clock

First I've made some tests with the eval board and I'm facing trouble with BAW Lock frequency detection.

With TICS Pro:

     I set the board in free run, APLL1 running, DPPL and APLL are desactivated

     XO input is set in SE (50Ohms), OUT1 is set in HCL(50Ohms) mode.

     STAT0_SEL is set to PLL1 Digital Lock Detect

     STAT1_SEL is set to XO Input Loss of Signal

    XO is connected to a RF generator

Tests:

When the RF signal is 10.000MHz applyed to XO, the LMK locks and operates correctly, the signals on OUT1 and  XO are in phasis, STAT0_SEL is high (showing the APLL1 is locked)

When I move of few thenth of Hertz the frequency applied on XO, the OUT1 remain in phasis with XO, the APLL1 is still locked

BUT, If I move widely the frequency applied on XO, the OUT1 and XO are no more in phasis, the APLL is unlocked, the trouble is that STAT0_SEL remains high!

I've tried to change BAW Lock detect parameters, but with any value tested (from 5 to 500ppm) the PLL1 Digital Lock Detect remains high whatever the XO frequency is...

Please could you help me to solve this problem ?

Many thanks

Christian

  • 0
    TI__Expert 8585 points

    Hello Christian,

    Could you please provide me with your TICS Pro configuration file?

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    Prodigy 50 points

    Dear Kia,

    Applogies for my late answer. Now I' trying to send the file but I can't find where to place on it for sending ?

    Very best Regards

    Christian

  • 0 in reply to Christian Sillans
    TI__Expert 8585 points

    Hello Christian,

    Please attach the tcs file to your E2E post using the following procedure:

    1. Select Insert and then Image/Video/File as shown below:

    2. Then select Upload and attach the tcs file.

    3. Once you have selected the file, press Ok on and the file will be added to your E2E post.

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    Prodigy 50 points

    IFOTEC_LMK05318B_CSI220321.tcs

    Hi Kia,

    Please find my TICS Pro configuration file.

    Best Regards

  • 0 in reply to Christian Sillans
    TI__Expert 8585 points

    Hello Christian,

    The BAW VCO can only handle a +/- 50 ppm frequency offset. This is why you lose lock when you shift your XO frequency widely. Please limit your XO frequencies ppm offset to less than +/- 50 ppm.

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    Prodigy 50 points

    Hello Kia,

    Thank you for your answer, but the trouble is that STAT0_SEL set to PLL1 Digital Lock Detect remains high even when the PLL is unlocked. An idea ?

    Thanks for your help

    Christian

  • 0 in reply to Christian Sillans
    TI__Expert 8585 points

    Hello Christian,

    APLL1 will always appear as locked because its frequency will always be 2500 MHz. This is why you see PLL1 Digital Lock Detect remain high when the PLL is unlocked.

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    Prodigy 50 points

    Dear Kia,

    When I apply the right frequency on XO I think that PLL1 is locked because:

    •  The VCO voltage is in middle of range, and if I change the frequency applied on XO I can see this voltage moving up or down depending on the frequency variation.
    • The Signal on selected output follows the the frequency applied on XO

    But for my application I need a digital information about this locking (or non locking) status.

    If I read R80 register, the bit7 shoud indicate if the BAW is locked or not, but it never changes whatever the frequency applied on XO   ????

    PLL1 Digital Lock Detect set to STATUS high whatever the XO frequency is.

    An idea ?

    Best regrads

    Christian

  • +1 in reply to Christian Sillans
    TI__Expert 8585 points

    Hello Christian,

    Your understanding is correct, R80[7] (BAW_LOCK) will indicate whether the BAW is locked or not.

    I tested you configuration in the lab today and was able to see BAW_LOCK go low when the XO ppm offset was greater than 900 ppm.

    As for the PLL1 Digital Lock Detect on the status pin, this will always remain high because the BAW VCO is set to 2.5 GHz as I had previously discussed.

    Therefore, the best solution would be to observe the BAW_LOCK to determine if the BAW is locked.

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    Prodigy 50 points

    Hello Kia,

    Thanks a lot for help. After having corrected few mistakes in my code the system is now OK.

    Another question is about the filter and capacitors values:

    In the Register description we do not find any value for C3 and C4. As you can see on the copy of the document, the description for C4 refers to C3 and description for C3 refers to C4 ????Thinking

    Best Regards

    Christian

  • 0 in reply to Christian Sillans
    TI__Expert 8585 points

    Hello Christian,

    Great!

    C3 and C4 will be set to 70 pF. You can observe these values in the GUI on the APLL1 page.

    Thank you for pointing out this issue. I will make a note to have our team update the descriptions to include the settings.

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    Prodigy 50 points

    Hello Kia,

    Many thank for your helpThumbsup

    Best regards

    Christian