TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB960-Q1: BIST Duration

    ReedKacz
    ReedKacz
    Part Number: DS90UB960-Q1 Hi Team, What is the recommended duration to run the BIST? Thanks Reed
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select correct RGMII delay mode for PHY and MAC?

    Vikram Sharma
    Vikram Sharma
    RGMII standard asks for the introduction of delay in the clock (RX_CLK/TX_CLK) with respect to the respective data (RX_D*/RX_CTRL or TX_D*/TX_CTRL). This delay can be introduced at the source of the clock or at the receiver side. Following table should…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select the crystal's ppm specification for an Ethernet system?

    Vikram Sharma
    Vikram Sharma
    Other Parts Discussed in Thread: DP83TC811 Ethernet data travels effectively from one MAC to another MAC with two Ethernet PHYs in between. Each of these 4 ICs can have their own reference clocks and crystal attached to each is the usual source of this…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867IR: DP83867 digital loopback fail, how to set MII and PCS loopback

    Richard Yang1
    Richard Yang1
    Part Number: DP83867IR Hi Team: Customer side need our help to find the root cause of DP83867 Communication failure issue from one failed board . could you please help to take a look at the attached , customer need to know How to enable MII and PCS…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] RGMII Timing - Align and Shift mode

    Gokul Koraganji
    Gokul Koraganji
    Definitions: TX_DATA[3:0], TX_CLK (naming of TI Ethernet PHYs) are transmitted by the MAC/(Repeater PHY) and RX_DATA[3:0], RX_CLK (naming of TI Ethernet PHYs) are transmitted by Ethernet PHY. S.No Mode Definition 1 PHY: RX Align…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB933-Q1: DS90UB933-Q1 and DS90UB913A-Q1 MODE Decode

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB933-Q1 Other Parts Discussed in Thread: DS90UB913A-Q1 , How do I determine if the DS90UB933-Q1 or DS90UB913A-Q1 device is operating in RAW10, RAW12LF, or RAW12HF through registers?
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] Demystifying Surge Protection

    Matt Smith
    Matt Smith
    Please refer to the links below to access our content related to Demystifying Surge Protection: Videos https://training.ti.com/getting-started-interface-protection White paper https://www.ti.com/lit/pdf/slyy152
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD Fundamentals Training

    Matt Smith
    Matt Smith
    Please refer to the links below to access our ESD Fundamentals training: Videos https://training.ti.com/getting-started-interface-protection Blog Posts Part 1: https://e2e.ti.com/blogs_/b/powerhouse/posts/esd-fundamentals-part-1-what-is…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD and TVS Protection Devices: Key Collateral and FAQs

    Matt Smith
    Matt Smith
    Please use the links below to access our top collateral/FAQs to learn all about protection devices, ESD and surge standards, and how to properly protect your system from ESD and surge events. [FAQ] What TI ESD/TVS diode should I use to protect Interfaces…
    • over 3 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Suggested Answer

    DS90UB913A-Q1: PoC Inductor Impedance Requirement Confirm 0 Locked

    465 views
    2 replies
    Latest over 7 years ago
    by Ting Ye
  • Suggested Answer

    DS90UB960-Q1: DS90UB960-Q1 detailed datasheet 0 Locked

    362 views
    1 reply
    Latest over 7 years ago
    by Liam Keese
  • Answered

    Linux/DS90UB954-Q1: Asking for ds90ub954-q1 Mode Select 0 Locked

    541 views
    1 reply
    Latest over 7 years ago
    by Liam Keese
  • Answered

    SN65HVD09: Terminal resistors 0 Locked

    1421 views
    6 replies
    Latest over 7 years ago
    by Adrian Ymeraj
  • Answered

    DP83822I: MIN and MAX value of T2 ~ T5 on 7.7 Timing Requirements, Reset Timing P11 0 Locked

    819 views
    5 replies
    Latest over 7 years ago
    by Aniruddha Khadye
  • Suggested Answer

    TUSB3410: About watchdog timer. 0 Locked

    303 views
    1 reply
    Latest over 7 years ago
    by Roberto Diaz
  • Answered

    DP83822IF: Some questions about PHY like DP83822 0 Locked

    1187 views
    1 reply
    Latest over 7 years ago
    by Aniruddha Khadye
  • Suggested Answer

    DP83867IS: Proper configuration for Xilinx TEMAC SGMII interface for 10/100/1000 0 Locked

    1949 views
    1 reply
    Latest over 7 years ago
    by Aniruddha Khadye
  • Answered

    TCA9555: Question on Open Drain pins 0 Locked

    2711 views
    9 replies
    Latest over 7 years ago
    by fhoude
  • Suggested Answer

    TFP401A: HDMI to 24-bit Display 0 Locked

    3126 views
    6 replies
    Latest over 7 years ago
    by Joel Jimenez0
  • Suggested Answer

    SN65DP141: Spec of Minimum Input Range? 0 Locked

    658 views
    4 replies
    Latest over 7 years ago
    by Francisco Javier Zamudio
  • Not Answered

    SN75LVPE801: SN75LVPE801 PCIe 3.0 Application Question 0 Locked

    726 views
    1 reply
    Latest over 7 years ago
    by Lee Sledjeski
  • Not Answered

    TFP410: No the output signal for TFP410 0 Locked

    1141 views
    6 replies
    Latest over 7 years ago
    by Joel Jimenez0
  • Suggested Answer

    TPS2511-Q1: About VIA of TPS2511-Q1 0 Locked

    320 views
    1 reply
    Latest over 7 years ago
    by Yongqiang Sun
  • Answered

    LMH1297: CDR Bit Sticky? 0 Locked

    429 views
    1 reply
    Latest over 7 years ago
    by Michael Lu (Santa Clara)
  • Suggested Answer

    TUSB8044: Recommendation of USB3.0 Hub scheme 0 Locked

    930 views
    5 replies
    Latest over 7 years ago
    by JMMN
  • Suggested Answer

    TPD4E05U06-Q1: Short-to-Battery & Short-to-ground protection 0 Locked

    1099 views
    5 replies
    Latest over 7 years ago
    by Matthew Xiong
  • Suggested Answer

    TPS2546: TPS2546 Eye diagram fail 0 Locked

    1028 views
    3 replies
    Latest over 7 years ago
    by Donovan Porter
  • Answered

    TPS2549-Q1: CTL Pin Related Queries 0 Locked

    1009 views
    5 replies
    Latest over 7 years ago
    by Yongqiang Sun
  • Suggested Answer

    TCA9543A: TCA9543A: Is level shifting from an 3V3 Master-I²C-Bus to an 5V-Slave-I²C-Bus also possible ? 0 Locked

    1970 views
    2 replies
    Latest over 7 years ago
    by fhoude
<>