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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83867CR: How to generate recovered clock using DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 : program register 0x0170[12:8] = 00000 for 125MHz program register 0x0170[12:8] = 00100 for 25MHz Note…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD and TVS Protection Devices: All Technical Documentation

    Chris Murphy
    Chris Murphy
    Application Notes Protecting Automotive Can Bus Systems from ESD Overvoltage Events ESD and Surge Protection for USB Interfaces Automotive SerDes ESD Protection MSP430 System-Level ESD Considerations (Rev. B)…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB960-Q1: BIST Duration

    ReedKacz
    ReedKacz
    Part Number: DS90UB960-Q1 Hi Team, What is the recommended duration to run the BIST? Thanks Reed
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select correct RGMII delay mode for PHY and MAC?

    Vikram Sharma
    Vikram Sharma
    RGMII standard asks for the introduction of delay in the clock (RX_CLK/TX_CLK) with respect to the respective data (RX_D*/RX_CTRL or TX_D*/TX_CTRL). This delay can be introduced at the source of the clock or at the receiver side. Following table should…
    • over 3 years ago
    • Interface
    • Interface forum
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  • Answered

    TUSB9261DEMO: Consultation about implementation 0 Locked

    298 views
    3 replies
    Latest over 1 year ago
    by Nicholaus_Malone
  • Suggested Answer

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    308 views
    3 replies
    Latest over 1 year ago
    by Tyler Townsend
  • Not Answered

    DP83867CR: High peaks value ok circuit 0 Locked

    515 views
    11 replies
    Latest over 1 year ago
    by Gerome Cacho
  • Suggested Answer

    DS90UB960-Q1: FPDLINK high speed channel requirements. 0 Locked

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    1 reply
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    DP83867IR: dp83867ir cannot link up 0 Locked

    204 views
    1 reply
    Latest over 1 year ago
    by Hillman Lin
  • Suggested Answer

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    200 views
    1 reply
    Latest over 1 year ago
    by David Creger
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    310 views
    3 replies
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    by Jonathan Nerger
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    237 views
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  • Answered

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