TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How can I ensure a successful PCIe Gen5 design?

    Nicholaus_Malone
    Nicholaus_Malone
    3 Tips for a successful PCIe Gen5 design With PCIe datarates increasing to 32Gbps in the latest PCIe Gen5 specification, PCIe has allowed for data higher throughput than ever before. Unfortunately, higher data rates can also mean more signal integrity…
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate free-running 125MHz clock from DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate free running clock of 125MHz on the CLKOUT pin of DP83867 (synced with local reference clock on XI pin) : program register 0x0170[12:8] = 01000
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate recovered clock using DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 : program register 0x0170[12:8] = 00000 for 125MHz program register 0x0170[12:8] = 00100 for 25MHz Note…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD and TVS Protection Devices: All Technical Documentation

    Chris Murphy
    Chris Murphy
    Application Notes Protecting Automotive Can Bus Systems from ESD Overvoltage Events ESD and Surge Protection for USB Interfaces Automotive SerDes ESD Protection MSP430 System-Level ESD Considerations (Rev. B)…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 3 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Not Answered

    regarding 10base-2 to AUI Transceiver 0 Locked

    381 views
    1 reply
    Latest over 9 years ago
    by Patrick OFarrell
  • Not Answered

    RS422 transceiver transient bus characteristics 0 Locked

    693 views
    3 replies
    Latest over 9 years ago
    by Ron Michallick
  • Not Answered

    Large Overshoot and Undershoot from Differential Line Receivers -- DS26LS32AC 0 Locked

    1882 views
    4 replies
    Latest over 9 years ago
    by Lee Sledjeski
  • Answered

    XIO2213B PROM 0 Locked

    335 views
    1 reply
    Latest over 9 years ago
    by Elias Villegas M.
  • Not Answered

    SN65HVD1780 RS-485 Application Issue 0 Locked

    937 views
    3 replies
    Latest over 9 years ago
    by Michael Peffers
  • Answered

    TPD5S116 used as HDMI Sink? 0 Locked

    778 views
    1 reply
    Latest over 9 years ago
    by Guy Yater
  • Answered

    Multiple Video Streams (DVI/HDMI) to Single Stream 0 Locked

    643 views
    4 replies
    Latest over 9 years ago
    by Michael Lu (Santa Clara)
  • Answered

    TLK2541 sync once 0 Locked

    735 views
    3 replies
    Latest over 9 years ago
    by Luis Omar Moran
  • Not Answered

    Request bsdl file for DS90C387AVJD 0 Locked

    337 views
    1 reply
    Latest over 9 years ago
    by Michael Lu (Santa Clara)
  • Answered

    DP83867IR and TPS2378 10/100/1000 Ethernet and PoE+ Magnetics 0 Locked

    717 views
    1 reply
    Latest over 9 years ago
    by Rob Rodrigues
  • Answered

    TLK10002: Is that more comprehensive description about the scramble function in TLK10002? 0 Locked

    827 views
    9 replies
    Latest over 9 years ago
    by Luis Omar Moran
  • Answered

    TLK10232 10G-KR Settings 0 Locked

    2640 views
    11 replies
    Latest over 9 years ago
    by Luis Omar Moran
  • Not Answered

    10Gbase-T ESD protection 0 Locked

    1316 views
    4 replies
    Latest over 9 years ago
    by Guy Yater
  • Answered

    switching device CAN - RS232 0 Locked

    1876 views
    10 replies
    Latest over 9 years ago
    by Casey McCrea
  • Not Answered

    Guidance after damaging SN65LVDT388ADBT inputs. 0 Locked

    621 views
    5 replies
    Latest over 9 years ago
    by W. David Lee
  • Not Answered

    Jitter measurement of TNETE2201B 0 Locked

    474 views
    4 replies
    Latest over 9 years ago
    by itabi
  • Not Answered

    TLK10232 for initialization order of the opposite configuration 0 Locked

    494 views
    2 replies
    Latest over 9 years ago
    by Hideo Tsutsui
  • Answered

    DP83848x PFBIN and PFBOUt 0 Locked

    768 views
    3 replies
    Latest over 9 years ago
    by Rob Rodrigues
  • Answered

    HDMI 2.0 4K @ 60fps (4.2.2 or 4.4.4) Support 0 Locked

    2527 views
    3 replies
    Latest over 9 years ago
    by Moises Garcia
  • Answered

    About TUSB3410 EVM circuit 0 Locked

    481 views
    1 reply
    Latest over 9 years ago
    by Elias Villegas M.
<>