TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Logic

Logic

Logic forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Logic support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search logic IC content or ask technical support questions on everything from voltage level translation and transceivers to standard logic gates and specialty logic devices. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] Why is there a voltage offset at the input of the SN74AXCxTxxx device?

    Dylan Hubbard
    Dylan Hubbard
    FAQ: Logic and Voltage Translation > Voltage Translators >> Current FAQ The AXC family of Voltage Translators have built in dynamic pull-downs at the I/O. These pull-downs assist with with the glitch free power sequencing feature included in this…
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] Do I still need pull-up/pull-down resistors with bus-hold circuitry?

    Albert Xu1
    Albert Xu1
    FAQ: Logic and Voltage Translation > Input Parameters >> Current FAQ Short answer: External pull-up/down resistors are not recommended for devices with bus-hold circuitry. Explanation: A pull-up or pull-down resistor will create a voltage-divider…
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] Why are the TXS01xx VIH/VIL specifications so stringent?

    Dylan Hubbard
    Dylan Hubbard
    FAQ: Logic and Voltage Translation > Voltage Translators >> Current FAQ TXS family translators utilize a FET-based architecture with an N-channel pass-gate transistor used to open and close the connection between the A-port and B-port. The FET connects…
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] [H] Frequently Asked Questions: Logic and Voltage Translation

    Michael J Schultis
    Michael J Schultis
    Select this link to see answers to common questions, detailed use case implementations, and part recommendations for logic and voltage translation devices. . Top Logic and Voltage Translation FAQs - All-Time How does a slow or floating input affect…
    • Answered
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] What is the typical delay of a logic device in a particular logic family?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Timing Parameters >> Current FAQ Delays vary from device to device, however a general idea of delay can be shown graphically: Two things to note from the above graphic (1) Delay always increases as the supply…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] Where can I get a CAD symbol, soldering footprint, or 3D model for my device?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Quality and Manufacturing >> Current FAQ TI utilizes the Ultra Librarian software to provide symbols, footprints, and 3D models for our devices. In the product folder for your selected device, scroll down and select…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] How do I set up a TI.com device re-stock notification?

    Sebastian Muriel
    Sebastian Muriel
    FAQ: Logic and Voltage Translation > Quality and Manufacturing >> Current FAQ 1. Search for the desired device in the TI store . 2. Click on the device and select the Ordering & Quality link. 3. Select the Notify me when available link. 4…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] What are the performance specifications of the HCS logic family at 3.3V operation?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Input Parameters >> Current FAQ This question comes up fairly often because the HCS logic family is specified only at 2V, 4.5V, and 6V. The following min / max values are interpolated from the datasheet tables…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] How do I select a bypass capacitor for a CMOS logic device?

    Emrys Maier
    Emrys Maier
    Other Parts Discussed in Thread: SN74LVC1G08 , SN74LVC16244A FAQ: Logic and Voltage Translation > Power and Thermals >> Current FAQ For the short answer - use a 0.1uF for single supply logic devices like the SN74LVC1G08, or a 0.022uF capacitor for each…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] What's the difference between logic output types (push-pull, open-drain, 3-state)?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Output Parameters >> Current FAQ Push-Pull Output A push-pull output can source current in the high state or sink current in the low state. In modern CMOS devices, the most common configuration for a push-pull…
    • over 4 years ago
    • Logic
    • Logic forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    Theta JC for SNJ54LVTH162244 0 Locked

    428 views
    3 replies
    Latest over 14 years ago
    by Chandru Dhavamani
  • Answered

    temp question of SN74LVC1G175DBVR 0 Locked

    239 views
    1 reply
    Latest over 14 years ago
    by Chris Cockrill
  • Answered

    ULN2003A with 1.8V 0 Locked

    627 views
    1 reply
    Latest over 14 years ago
    by Ron Michallick
  • Answered

    Propagation delay versus temperature for all logic families 0 Locked

    421 views
    1 reply
    Latest over 14 years ago
    by Chris Cockrill
  • Answered

    Multiple voltage level on I2C with TXS0102 0 Locked

    745 views
    1 reply
    Latest over 14 years ago
    by Dwight
  • Answered

    SN74BCT760 IOL Distribution 0 Locked

    353 views
    1 reply
    Latest over 14 years ago
    by Chris Cockrill
  • Answered

    ESD protection on IIC and SPI lines 0 Locked

    2429 views
    3 replies
    Latest over 14 years ago
    by Dwight
  • Answered

    SN74AVC4T245 0 Locked

    385 views
    1 reply
    Latest over 14 years ago
    by Hattie
  • Answered

    TXB0104 0 Locked

    389 views
    1 reply
    Latest over 14 years ago
    by Dwight
  • Answered

    TXB0104 0 Locked

    381 views
    1 reply
    Latest over 14 years ago
    by Dwight
  • Answered

    SN74LVCB3T16211 availability and alternate part 0 Locked

    336 views
    1 reply
    Latest over 14 years ago
    by Hattie
  • Answered

    CD4044 how to force Q=0 upon power up 0 Locked

    572 views
    1 reply
    Latest over 14 years ago
    by Chris Cockrill
  • Not Answered

    Looking fo a 2-1multiplexer 0 Locked

    273 views
    2 replies
    Latest over 14 years ago
    by Aleo Salvi
  • Answered

    SN74HC253D Application Question 0 Locked

    268 views
    2 replies
    Latest over 14 years ago
    by Greg Pastalan
  • Answered

    txs0104e translates down but not up? 0 Locked

    401 views
    2 replies
    Latest over 14 years ago
    by Tom Pierce
  • Answered

    Typical voltage drop across input to output path of SN74CBTLV16212 0 Locked

    351 views
    1 reply
    Latest over 14 years ago
    by Dwight
  • Answered

    nMOS symbol in transceivers, etc. 0 Locked

    1152 views
    2 replies
    Latest over 14 years ago
    by Anonymous
  • Answered

    SN74LVC244A exposed thermal pad dimension 0 Locked

    325 views
    2 replies
    Latest over 14 years ago
    by thunder yuan
  • Answered

    Logic gates DIP package? 0 Locked

    620 views
    1 reply
    Latest over 14 years ago
    by Chris Cockrill
  • Answered

    CD74HC123PW pulse width is different than calculated 3 sec delay. 0 Locked

    532 views
    3 replies
    Latest over 14 years ago
    by Chris Cockrill
<>