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Processors

Processors

Processors forum

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Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] AM6412: AM64x SoC power supply slew control for 3.3V_SYS using load switch

    Sirui Zhu
    Sirui Zhu
    Part Number: AM6412 Other Parts Discussed in Thread: TPS65219 Hi team, I'm helping my customer design the power part of AM64. For the power supply slew rate control part, it says the slew rate should be controlled under 18mV/us. How should we set…
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] Redundant boot from eMMC boot partitions on AM62x

    Hong Guan64
    Hong Guan64
    1. booting from eMMC boot partition vs UDA partition It is recommended to use eMMC boot partition for user's BootLoader (BL) - eMMC boot partition is designed for bootloader user case - it is possible to write-protect boot0/boot1 as necessary - eMMC boot…
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] AM62A3: Any way to get 2 eMMC interfaces?

    Brad Caldwell
    Brad Caldwell
    Part Number: AM62A3 Hello, Using the AM62A, is there any way to implement two eMMC interfaces? The device has 3 MMC interfaces but the datasheet only shows MMC0 supporting eMMC. We really need a way to get 2 so I'll ask a couple questions from someone…
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] PROCESSOR-SDK-TDAX: How to change input display pipeline in the DSS M2M WB node?

    Brijesh Jadav
    Brijesh Jadav
    Part Number: PROCESSOR-SDK-TDAX The patches shared on below link adds support for DSS memory to memory path in the vision apps and TIOVX. These patches are also integrated SDK8.6. By default, this patch uses VIDL2 pipeline as input pipeline and WB pipeline…
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] TDA4VM: Process OpenVX Graph while simultaneously configuring a camera

    Nikhil Dasan
    Nikhil Dasan
    Part Number: TDA4VM How to configure a camera without affecting the OpenVX graph, while the single cam application graph is running
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 and AM2434, AM2432, AM2431 (ALV, ALX) Custom board hardware design – Queries regarding Crystal selection and clock specifications

    Lavanya M R
    Lavanya M R
    Part Number: AM6442 AM2432 AM6411 AM2431 AM6422 AM6412 AM6421 AM2434 AM6441 Other Parts Discussed in Thread: TMDS64EVM , , AM3352 , AM62A3-Q1 , AM62L , OMAP-L138 , AM62A7 Hi TI Experts, I have the below queries regarding the crystal selection. …
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 and AM2434, AM2432, AM2431 (ALV, ALX) Custom board hardware design – I2C interface

    Lavanya M R
    Lavanya M R
    Part Number: AM6442 Other Parts Discussed in Thread: AM62A7 , AM6412 , AM6422 , , AM2434 , SK-AM64B Hi TI Experts, I have the below queries regarding the I2C interface: Need information on the number of I2C interfaces available Termination of…
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] AM623: Does AM62x support two 4GB DDR?

    Gibbs Shih
    Gibbs Shih
    Part Number: AM623 Hi, TI Partner Follow data sheet. it describe as below. DDR Subsystem (DDRSS) – Supports LPDDR4, DDR4 memory types – 16-Bit data bus with inline ECC – Supports speeds up to 1600 MT/s – Max addressable range • 8GBytes with DDR4…
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] PROCESSOR-SDK-J721E: How to enable blending operation and two input video pipelines in DSS memory to memory path?

    Brijesh Jadav
    Brijesh Jadav
    Part Number: PROCESSOR-SDK-J721E DSS WB path can take input from the overlay manager output and overlay manager in the DSS can take input from two video pipelines and can blend the images and can send it out. In the current PSDKRA6.0, SDK supports only…
    • Answered
    • over 2 years ago
    • Processors
    • Processors forum
  • [FAQ] AM623: SPI DATA MISO/MOSI usage for D0 / D1

    Martin Stelter
    Martin Stelter
    Part Number: AM623 SPI data pins are named as D0 and D1. Where can i find information about the usage regarding in/output or which one is MISO / MOSI?
    • over 2 years ago
    • Processors
    • Processors forum
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