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Frequent questions

  • [FAQ] AM625 / AM623 Custom board hardware design - Design and Review notes for Reuse of SK-AM62B-P1 Schematics

    Part Number: AM625 Other Parts Discussed in Thread: SK-AM62B-P1 , SK-AM62B , SK-AM62-LP , SK-AM62-SIP , SYSCONFIG , Hi TI Experts, I am starting a new board design and planning to use TI Starter Kit (SK) design files for designing my custom board.…

  • [FAQ] TDA4VL-Q1: Run vision_apps in SBL boot flow with BootApp image

    Part Number: TDA4VL-Q1 What are the steps involved in running vision_apps in SBL boot flow with Bootapp image?

  • [FAQ] AM62A7: How to modify and rebuild TI's 2A algorithm for AM6xA Processor SDK Linux?

    Part Number: AM62A7 Other Parts Discussed in Thread: AM68A , AM69A , AM62A3 , , AM62A3-Q1 I'm using the Processor SDK Linux for AM6xA for Edge AI applications. I want to modify and rebuild TI's 2A algorithm and run it in the SDK. How can I do that? …

  • [FAQ] How do I enable MAC Port based broadcast/multicast rate limiting?

    How to I enable MAC Port based broadcast/multicast rate limiting? and configuration?

  • [FAQ] TDA4VL: How to profile a GPIO toggled ISR , any example?

    Part Number: TDA4VL Hello team, I need a baremetal pdk based example just to see the profiling time for interrupts via toggling of GPIO pin .Can you please show us how ?

  • [FAQ] AM625: what is the specific delay time requirement between the different power rail?

    Part Number: AM625 Hi Expert, In AM62 datasheet, I can find the power up sequence as below, but I can't find the specific delay time requirement. or there is no requirement as waveform B need delay with waveform A? BR, Biao

  • [FAQ] SK-AM62X/SK-AM62A-LP: Testing MCAN External Loopback example using external transceiver TCAN1042D

    Part Number: SK-AM62A-LP Other Parts Discussed in Thread: SYSCONFIG How to test MCAN external loopback example on AM62x/AM62A using an external transceiver ?

  • [FAQ] TDA4VH-Q1: Accelerate Transformer Models on TI SoCs.

    Part Number: TDA4VH-Q1 TIDL SDK Version : 9.1 I have downloaded transformer model (deit) from Tis Tools repos : https://github.com/TexasInstruments/edgeai-tidl-tools/blob/master/docs/tidl_fsg_vtfr.md#deit-transformer-example Facing issues while…

  • [FAQ] How do I get a valid param.yaml file for my TIDL deep learning model? The demos in edgeai-gst-apps throw errors on my model

    Other Parts Discussed in Thread: AM69A , AM68A I compiled a model for a device (AM62A, AM68A, AM69A, etc.) with edgeai-tidl-tools and compilation did not throw any errors. I want to evaluate my model on the EVM now, and I see edgeai-gst-apps is the…

  • [FAQ] TDA4VL-Q1: How to generate downstream PCIe interrupt from RC to EP

    Part Number: TDA4VL-Q1 Other Parts Discussed in Thread: AM68 , TDA4VM , TDA4VL , TDA4VH , AM69 TDA4VL, TDA4VM, TDA4VH, and their respective AM6x device counterparts of AM68, TDA4VM, and AM69 all have the ability to generate a downstream PCIe interrupt…

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