CDCE913: VCXO issue of the CDCE913 clock

Gabriel Wang1

Part Number: CDCE913

Dear Expert

Regarding the VCXO issue of the CDCE913 clock management chip, there is a difference in the relationship and specifications between the voltage change and the Pulling Range when adjusting the VCTRL input voltage. Can you help analyze the cause of the problem.

Below is sch

27p_fhd.pdf

When the VCTRL input is 1.0V as the reference, adjust the input to below 0.4V, with a Pulling Range of approximately -40PPM. Adjust the input to above 1.5V, with a Pulling Range of approximately+13PPM, which differs significantly from the curve characteristics

7 months ago

0 Kadeem Samuel 7 months ago

TI__Genius 12640 points

Gabriel,

The load capacitors C740 and C743 are not needed as CDCE913 does have internal load caps. By default they are set to 10pF. Higher cap load on the xtal can create an issue here. Alternatively, the internal load capacitors can be programmed to 0 pF.

Additionally, the pullability will depend on how pullable the XTAL is - see this thread for more information: https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/561813/cdce913-cdce913-vcxo-pulling-range

Thanks,

Kadeem

Clock & timing

Clock & timing forum

CDCE913: VCXO issue of the CDCE913 clock