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Clock & timing

Clock & timing

Clock & timing forum

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Texas Instruments (TI) Clock & timing support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search clock & timing IC content or ask technical support questions on everything from clock synchronizers and generators to clock buffers and timers. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.

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Frequent questions
  • [FAQ] TLC555: What are the performance differences expected for TLC555 PCN 20231130002.1?

    Ron Michallick
    Ron Michallick
    Part Number: TLC555 Other Parts Discussed in Thread: , TLC3555-Q1 , TLC3555 Tool/software: PCN 20231130002.1 is the “Qualification of RFAB using qualified Process Technology, Die Revision, Datasheet update and additional Assembly Site/BOM options…
    • Answered
    • 2 months ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Does TI have crosses for obsolete Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987 as per the Product Discontinuance Notice issued by ADI on March 22, 2022?

    Vibhu  Vanjari
    Vibhu Vanjari
    TI’s wide portfolio of RF PLLs & synthesizers features devices that are potential crosses for Analog Devices HMC103x, HMC7xx, HMC8xx PLL family products and other discontinued products such as ADF5610 and HMC987. With most of TI’s RF PLLs & synthesizers…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] TPL5010: How to disable the watchdog function of TPL5010

    Dong Shen1
    Dong Shen1
    Part Number: TPL5010 Hi all, I am a FAE of TI,now my customer has a watchdog disabled problem, so I synchronously ask you for a solution: Problem Description: the customer's MCU wants to disable the watchdog function during the recording program…
    • Answered
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: How to connect the unused pins?

    Kia Rahbar
    Kia Rahbar
    When a pin on my clock buffer is not being used, what is the correct termination?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] Clock Buffers: Can my buffer handle an input while it is powered off?

    Aaron Black
    Aaron Black
    If my buffer is powered off can an input go into the device without damaging it?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: How to deal with the unused output differential pin in a RF synthesizer?

    Noel Fung
    Noel Fung
    I need single-ended output, how to deal with the unused output differential pin?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: Sample programming code for RF synthesizers

    Noel Fung
    Noel Fung
    Can TI provide sample code to program RF synthesizers?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: What is MASH order and how to determine the suitable MASH order in RF synthesizers?

    Noel Fung
    Noel Fung
    Can you tell me what is MASH order and how to determine the suitable MASH order?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: What is PFD delay and how to determine the value?

    Noel Fung
    Noel Fung
    Can you tell me what is PFD delay and how to determine the value?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • [FAQ] RF synthesizers: Where is the Dean's book?

    Noel Fung
    Noel Fung
    I cannot find and download Dean Banerjee's PLL Performance, Simulation, and Design book. Can you tell me where I can get a copy?
    • Answered
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
>

View FAQ threads
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  • Not Answered

    LMX2594EVM: No RFoutB out by SysRef input mode 0 Locked

    258 views
    2 replies
    Latest over 4 years ago
    by Noel Fung
  • Answered

    LMX2582: PLLatinum Simulator does not have the correct charge pump currents 0 Locked

    330 views
    3 replies
    Latest over 4 years ago
    by David Hawkins
  • Not Answered

    LMX2595: LMX2595 0 Locked

    244 views
    2 replies
    Latest over 4 years ago
    by Narendra S10
  • Suggested Answer

    LMX2615-SP: Is there an alternative method of changing frequencies that eliminates dead time between frequencies? 0 Locked

    498 views
    5 replies
    Latest over 4 years ago
    by Derek Payne
  • Not Answered

    TPL5010: The watchdog pulls the reset pin low in advance 0 Locked

    666 views
    1 reply
    Latest over 4 years ago
    by Derek Payne
  • Answered

    LMK04803: PLL2_CP_POL and PLL1_CP_POL 0 Locked

    278 views
    1 reply
    Latest over 4 years ago
    by Derek Payne
  • Answered

    LMX2594: Power up sequences 0 Locked

    288 views
    1 reply
    Latest over 4 years ago
    by Noel Fung
  • Suggested Answer

    LMK5C33216: Delay tuning 0 Locked

    358 views
    3 replies
    Latest over 4 years ago
    by Timothy T
  • Suggested Answer

    LMK04828: crosstalk data 0 Locked

    166 views
    1 reply
    Latest over 4 years ago
    by Derek Payne
  • Suggested Answer

    LMX2594: Need help understanding LMX2594 spurs 0 Locked

    744 views
    5 replies
    Latest over 4 years ago
    by Noel Fung
  • Suggested Answer

    LMX2492: Chip Enable and Register Volatility 0 Locked

    302 views
    1 reply
    Latest over 4 years ago
    by Noel Fung
  • Answered

    LMK05318: Kvco numeric of VCO1 and VCO2 for PLLatinum 0 Locked

    305 views
    4 replies
    Latest over 4 years ago
    by Hirotaka Matsumoto
  • Answered

    LMK04803: Automatic on "8.3.9.3.2 Methods of Generating SYNC" 0 Locked

    409 views
    1 reply
    Latest over 4 years ago
    by Derek Payne
  • Suggested Answer

    LMK04208EVM: 76.8 MHz VCXO recommendation 0 Locked

    1409 views
    20 replies
    Latest over 4 years ago
    by Derek Payne
  • Suggested Answer

    LMK04616: Looking for Synchronization solution 0 Locked

    325 views
    1 reply
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    by Derek Payne
  • Suggested Answer

    CDCDB2000: P2P Device with 9QXL2000BNLGI8 Consult 0 Locked

    344 views
    1 reply
    Latest over 4 years ago
    by Derek Payne
  • Not Answered

    promote suitable solution 0 Locked

    109 views
    1 reply
    Latest over 4 years ago
    by Derek Payne
  • Answered

    TPL5111: Clock & timing forum 0 Locked

    466 views
    5 replies
    Latest over 4 years ago
    by Sunglin Chen
  • Answered

    LMK01801: CLKinX to CLKoutY delay min and max 0 Locked

    255 views
    2 replies
    Latest over 4 years ago
    by Variac996
  • Answered

    LMK04832: VCO0 Out of Range: minimum tuning frequency is around 2.51GHz 0 Locked

    640 views
    6 replies
    Latest over 4 years ago
    by Derek Payne
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