Tool/software:
This Master FAQ lists serves as a point of reference to find all FAQs made by TI's Ethernet Team.
Standard Ethernet
- How do I choose magnetics for my industrial PHY?
- TI Ethernet PHY Capacitive Coupling (Transformerless Operation)
- Does Oscillator Clock or other external clock source to XI pin need to be stable before PHY power?
- 10base-T and 10 base-Te difference
- Can Auto-negotiation link up with Force mode on 100mbps?
- What is the difference between RMII slave signaling and RMII master signaling?
- How to adjust the Output Differential Voltage (VOD) of the DP83825I
- DP83826E: How do I determine the MSE/SNR levels using DP83826?
- How does pin 29 on DP83826 act depending on strap mode?
- How does Strap1 (CLKOUT/LED1) work on DP83826?
- In enhanced mode, how does DP83826 strapping work?
- How to use RMII repeater mode in DP83822?
- Link up debug with DP83822
- DP83822IF: Fiber Link Status
- DP83822HF: How does power up sequence affect PHY operation?
- How DP8386x RGMII Straps Work
- What is the default mode of RGMII when using DP83867, shift or align?
- DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits
- DP83867E: How to force 10/100/1000 Mbps speed in Ethernet PHYs?
- DP83867E: Expected Back-Powering on Power Supply Pins
- DP83869: JTDI/SD Pin connection on SFP connector
- DP83869HM: Checking SGMII link up
- How to use DP83869EVM for Copper to Fiber Media Conversion?
- How to tune swing level of SGMII on DP83869
- How to generate 125MHz on CLKOUT pin for DP83869
- DP83869HM: Bridge Mode Clarification
- DP83869HM: SGMII Output Differential Voltage Clarification
- What is the potential swing levels of DP83TD510E when linking up with link partner?
- Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?
- How to use ping and iperf between two PCs through 510EVM Link?
Application Specific
Ethernet Compliance
- DP83822H: How do I configure MDI swing levels to assist with VoD compliance?
- DP83822: How to improve margin in 10BaseTe TP_IDL Compliance Tests?
- DP83867 Harmonic Distortion compliance test mode
- DP83867E: 1000Base-T Ethernet Compliance Register Script
EtherCAT
- DP83826I: How do I debug a PHY issue within an EtherCAT network?
- 822/826 Odd Nibble Detection disable for EtherCAT application
Single Pair Ethernet
- DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?
- DP83TC812R-Q1: How can I connect PHYs back to back over RMII?
- DP83TC812S-Q1: My PHY won't link up
- DP83TC813S-Q1: How to output LED1 signal on pin 14
- DP83TC812S-Q1: How to to adjust slew rate of MAC IOs
- Where can I find the latest Linux Drivers for DP83TG720 and DP83TG812/3/4?
- DP83TG720R-Q1: Why is my SGMII eye measurement distorted?
- DP83TG720S-Q1: How to maximize temperature sensor accuracy
Overall Ethernet
- How to Confirm Ethernet PHY Strapping
- Extended Register Space Access for Ethernet PHYs
- Announcing New GUI Application for Ethernet EVM & PHY Evaluation
- What different types of Reset are available on a TI Ethernet PHY?
- How to read and write Ethernet PHY registers using a Linux terminal?
- Which Redriver/Retimer should I use for each PCIe data rate?
- RGMII Timing - Align and Shift mode