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Frequent questions

  • [FAQ] DP83822I: Link up debug with DP83822

    Part Number: DP83822I

  • [FAQ] DP83822I: 822/826 Odd Nibble Detection disable for EtherCAT application

    Part Number: DP83822I For 822/826 PHYs, Odd Nibbles Detection register need to be disable in order to prevent unexpected link loss in EtherCAT application. DP83826PHY: Odd Nibble Detection could be disable by strap 1 CLKOUT/LED1 pin in enhanced…

  • [FAQ] Can Auto-negotiation link up with Force mode on 100mbps?

  • [FAQ] DP83822IF: Fiber Link Status

    Part Number: DP83822IF Other Parts Discussed in Thread: DP83822HF , The DP83822IF and DP83822HF are the fiber capable variants of the DP83822. Bit 2 in Register 0x0001 indicates link status for both Copper and Fiber modes of operation. In copper mode…

  • [FAQ] Extended Register Space Access for Ethernet PHYs

    Our Ethernet PHYs have a standard set of registers, 0x0-0x1F, that can be accessed in a straight forward fashion. Registers beyond 0x1F require a different approach to access. This FAQ is intended to provide a few examples on how to read/write these…

  • [FAQ] SN65DSI86: SN65DSI86 Resolution Guide

    Part Number: SN65DSI86 What display resolution will the SN65DSI86 support?

  • [FAQ] DP83867E: What is the default mode of RGMII when using DP83867, shift or align?

    Part Number: DP83867E When bootstrapped to be in RGMII mode, DP83867 will be in shift mode by default; not align mode. The modes will be corroborated via Reg 0x32[1:0].

  • [FAQ] DP83869HM: How to generate 125MHz on CLKOUT pin for DP83869

    Part Number: DP83869HM DP83869HM needs an additional register to be written to enable CLKOUT modification. By default, this signal is a buffered version of the XI signal. Reg 0xC6 must have 0x10 written in order for the value in Reg 0x170[12:8] to take…

  • [FAQ] TI Ethernet PHY Capacitive Coupling (Transformerless Operation)

    Other Parts Discussed in Thread: DP83869 Summary: All of our Industrial Ethernet PHYs support Transformer-less Operation via Capacitive Coupling except for the DP83867. The DP83867 does not support Transformer-less Operation. List of Industrial…

  • [FAQ] DP83867E: Ethernet PHY SGMII Vdiff Upper and Lower Input Limits

    Part Number: DP83867E Other Parts Discussed in Thread: DP83869 The DP83867 and DP83869 both have the same Vdiff Upper and Lower Input Limits of: 100 mV and 800 mV

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