TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How can I ensure a successful PCIe Gen5 design?

    Nicholaus_Malone
    Nicholaus_Malone
    3 Tips for a successful PCIe Gen5 design With PCIe datarates increasing to 32Gbps in the latest PCIe Gen5 specification, PCIe has allowed for data higher throughput than ever before. Unfortunately, higher data rates can also mean more signal integrity…
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate free-running 125MHz clock from DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate free running clock of 125MHz on the CLKOUT pin of DP83867 (synced with local reference clock on XI pin) : program register 0x0170[12:8] = 01000
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867CR: How to generate recovered clock using DP83867?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83867CR To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 : program register 0x0170[12:8] = 00000 for 125MHz program register 0x0170[12:8] = 00100 for 25MHz Note…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] ESD and TVS Protection Devices: All Technical Documentation

    Chris Murphy
    Chris Murphy
    Application Notes Protecting Automotive Can Bus Systems from ESD Overvoltage Events ESD and Surge Protection for USB Interfaces Automotive SerDes ESD Protection MSP430 System-Level ESD Considerations (Rev. B)…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 3 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Answered

    SN75DP122A: SN75DP122A IBIS File 0 Locked

    367 views
    3 replies
    Latest over 6 years ago
    by David (ASIC) Liu
  • Suggested Answer

    HD3SS3220: Capacitors on Tx/Rx 0 Locked

    1310 views
    6 replies
    Latest over 6 years ago
    by Terry Wu2
  • Suggested Answer

    DS90UB954-Q1EVM: DS90UB954 is recognized as DS90UH925 by ALP(Analog LaunchPad) 0 Locked

    663 views
    4 replies
    Latest over 6 years ago
    by Vishy Viswanathan
  • Answered

    TL16C752D: UART ISR Problem with Large Block Data Transmission 0 Locked

    390 views
    5 replies
    Latest over 6 years ago
    by Reif Heck11
  • Suggested Answer

    TUSB1210: It seems output data & clock violate ULPI interface timing requirements 0 Locked

    662 views
    1 reply
    Latest over 6 years ago
    by Brian Zhou
  • Not Answered

    Linux/DP83867IR: Can link but ping is intermittent 0 Locked

    763 views
    4 replies
    Latest over 6 years ago
    by Ben Hershey
  • Answered

    Linux/SN65DSI83: The screen is abnormal 0 Locked

    445 views
    1 reply
    Latest over 6 years ago
    by Ikechukwu Anyiam
  • Suggested Answer

    LMH1983: CLKout Phase Noise 0 Locked

    291 views
    1 reply
    Latest over 6 years ago
    by Rob Rodrigues
  • Suggested Answer

    DP83867E: XI/XO interface model 0 Locked

    237 views
    1 reply
    Latest over 6 years ago
    by Ross Pimentel
  • Suggested Answer

    DP83848K: Urgent, EMI issue for DP83848K 0 Locked

    469 views
    1 reply
    Latest over 6 years ago
    by Ross Pimentel
  • Suggested Answer

    TPS65987D: How to control TUSB546 via I2C Port 3? 0 Locked

    1077 views
    12 replies
    Latest over 6 years ago
    by pj go
  • Answered

    TPS65983B: Another Cable Detection Problem 0 Locked

    210 views
    1 reply
    Latest over 6 years ago
    by Patobravo
  • Suggested Answer

    DS80PCI810: DS80PCI810 VOD VS VOD_EB 0 Locked

    499 views
    3 replies
    Latest over 6 years ago
    by Lee Sledjeski
  • Answered

    Linux/TUSB9261: how to program TUSB9261 flash on linux ? 0 Locked

    2068 views
    7 replies
    Latest over 6 years ago
    by Nicholaus_Malone
  • Suggested Answer

    DS250DF410: ds250df410 detail datasheet and reference design 0 Locked

    258 views
    1 reply
    Latest over 6 years ago
    by Nasser Mohammadi
  • Suggested Answer

    LM8330: Power consumption with RESETN drive low 0 Locked

    276 views
    1 reply
    Latest over 6 years ago
    by BOBBY
  • Suggested Answer

    DS125BR820: VOD quesiton 0 Locked

    370 views
    1 reply
    Latest over 6 years ago
    by Lee Sledjeski
  • Suggested Answer

    TFP401: HDMI to LVDS 0 Locked

    1035 views
    1 reply
    Latest over 6 years ago
    by Ikechukwu Anyiam
  • Answered

    DS80PCI810: [DS80PCI810NJYT] How to setting Hot swap by control SMBUS register 0 Locked

    280 views
    1 reply
    Latest over 6 years ago
    by Lee Sledjeski
  • Suggested Answer

    CCS/TCA6424A: issues writing to the device using the I2C bus 0 Locked

    870 views
    6 replies
    Latest over 6 years ago
    by Chris Sterzik
<>