TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Interface

Interface

Interface forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83TD510E: What is the potential swing levels of DP83TD510E when linking up with link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TD510E
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] Ethernet PHY - Functional Safety FIT Rate, FMD and Pin FMA Reports

    James Lee
    James Lee
    We currently do not have Functional Safety FIT Rate, FMD, and Pin FMA Report available for devices released before DP83TC812.
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What different types of Reset are available on a TI Ethernet PHY?

    David Creger
    David Creger
    There are four different types of resets available on a TI Ethernet PHY, each with it's own use case. Pin Reset: Activated by asserting the Reset pin low. Digital core is reset, link up process will restart. All internal registers will reinitialize…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] What is a WUP and how does a CAN transceiver send and receive a WUP on the BUS?

    Chris Ayoub
    Chris Ayoub
    Other Parts Discussed in Thread: TCAN1043A-Q1 Introduction Any CAN transceiver that has an Inhibit (INH) pin will also have a sleep mode. The purpose of the INH pin is to be able to automatically turn off the voltage regulator for your MCU/Board. This…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB935-Q1: FPD-Link Data Rate 3Gbps?

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB935-Q1 Does the DS90UB935-Q1 FPD-Link interface run at 3Gbps or 4Gbps?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB954-Q1: CSI-2 Lanes SER vs. DES

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB954-Q1 Does the number of CSI-2 lanes programmed for 954 need to match the number of input lanes for 953/935?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB953-Q1: Imager Data Rate Support

    Casey McCrea
    Casey McCrea
    Part Number: DS90UB953-Q1 ​​​Can the DS90UB953-Q1 support my imager?
    • Answered
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867E: How to force 10/100/1000 Mbps speed in Ethernet PHYs?

    Evan Mayhew
    Evan Mayhew
    Part Number: DP83867E Other Parts Discussed in Thread: USB-2-MDIO To force a specific speed, auto-negotiation is left enabled while disabling advertisements for all non-desired speeds. The scripts to do this in the USB-2-MDIO interface for the DP83867…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] How to read and write Ethernet PHY registers using a Linux terminal?

    David Creger
    David Creger
    There are several different tools available in a Linux environment to read and write registers on a TI PHY. Several of these options are listed below. MII read: This is the only command which can and must be used in U-boot. Stop the autoboot process…
    • over 2 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812S-Q1: How to disable 25MHz clock on clkout pin?

    Vikram Sharma
    Vikram Sharma
    Part Number: DP83TC812S-Q1 For DP83TC812S/R and DP83TC814-Q1 if clkout pin is not being used to provide a clock signal to another component, then it is recommended to shut down this clock output and reduce its impact on EM emissions. Clkout's output…
    • over 2 years ago
    • Interface
    • Interface forum
<>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Suggested Answer

    TPS65982: PD Reset due to VIN_3V3 Drop 0 Locked

    556 views
    1 reply
    Latest over 7 years ago
    by Eric Beljaars
  • Answered

    TUSB8041: Power sequence requirement (datasheet conflicts) 0 Locked

    1147 views
    5 replies
    Latest over 7 years ago
    by Dave Selig
  • Suggested Answer

    SN65DSI86: SN65DSI86 PSR function confirmation 0 Locked

    589 views
    3 replies
    Latest over 7 years ago
    by Joel Jimenez0
  • Suggested Answer

    TPD12S521: HDMI broken which differential lines shorted to ground but ESD IC still good. 0 Locked

    2876 views
    4 replies
    Latest over 7 years ago
    by Thomas Amlee
  • Suggested Answer

    There are some question of SN65DSI86 in VR application scenario 0 Locked

    543 views
    1 reply
    Latest over 7 years ago
    by Joel Jimenez0
  • Answered

    TFP410: How to configure Vref pin 0 Locked

    786 views
    2 replies
    Latest over 7 years ago
    by Hiroshi Katsunaga
  • Answered

    TPS2543: About layout pattern of D+ and D- line 0 Locked

    1824 views
    10 replies
    Latest over 7 years ago
    by Hide
  • Suggested Answer

    Need Processor with Device Level Switch (DLR) topology 0 Locked

    439 views
    1 reply
    Latest over 7 years ago
    by Biser Gatchev-XID
  • Suggested Answer

    DS90UB954-Q1EVM: ALP cannot connect to DES 954 0 Locked

    919 views
    2 replies
    Latest over 7 years ago
    by DavyS
  • Suggested Answer

    DS90UB926Q-Q1: Can DS90UB926Q-Q1 can suport Digital 444 0 Locked

    627 views
    3 replies
    Latest over 7 years ago
    by Steven(Shenzhen) Shi
  • Answered

    DS90UB953-Q1: support 8M@15Fps or 13M@9Fps camera? 0 Locked

    525 views
    2 replies
    Latest over 7 years ago
    by Bruce li
  • Suggested Answer

    DS90UB954-Q1: screen for 954 EVM 0 Locked

    694 views
    4 replies
    Latest over 7 years ago
    by Steven(Shenzhen) Shi
  • Answered

    TFP401: Jitter in HSYC output at 1280 x 1024, 60 Hz 0 Locked

    1022 views
    7 replies
    Latest over 7 years ago
    by Masanori Tachibana
  • Suggested Answer

    DS90CR288A: May we have DS90CR288AMTD/DS90CR286AMTD .DSN file and design guide? 0 Locked

    501 views
    1 reply
    Latest over 7 years ago
    by Dennis Wu
  • Suggested Answer

    TL16C752C: No interrupt occur even if the CDA#, CDB# pin state changed? 0 Locked

    1230 views
    6 replies
    Latest over 7 years ago
    by user597158
  • Answered

    TPD12S016: Alternate Recommendation 0 Locked

    616 views
    1 reply
    Latest over 7 years ago
    by Thomas Amlee
  • Answered

    TUSB212-Q1: Assembly Test with I2C mode 0 Locked

    664 views
    2 replies
    Latest over 7 years ago
    by Kenichiro
  • Answered

    DS90UB953-Q1EVM: DS90UB954-Q1 difference between pre EVM and latest EVM 0 Locked

    643 views
    2 replies
    Latest over 7 years ago
    by Liam Keese
  • Answered

    DP83822I: The power supply for AVD and VDDIO 0 Locked

    1258 views
    1 reply
    Latest over 7 years ago
    by Rob Rodrigues
  • Answered

    DS90UB953-Q1: DS90UB954-Q1 , latency between CSI input to Dout and Dout input to CSI output 0 Locked

    660 views
    2 replies
    Latest over 7 years ago
    by Liam Keese
<>